
Obj/FWlib_apt32f172_epwm.o:     file format elf32-csky-little


Disassembly of section .text:

00000000 <EPWM_RESET_VALUE>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_RESET_VALUE(void)
{
		EPWM->CR=PWM_CR_RST;     				/**< CR  reset value  	*/
   0:	107e      	lrw      	r3, 0	// 78 <EPWM_RESET_VALUE+0x78>
   2:	3280      	movi      	r2, 128
   4:	9360      	ld.w      	r3, (r3, 0)
   6:	4250      	lsli      	r2, r2, 16
   8:	b340      	st.w      	r2, (r3, 0)
		EPWM->LKCR=PWM_LKCR_RST;     			/**< LKCR  reset value 	*/
   a:	3200      	movi      	r2, 0
   c:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKTRG=PWM_LKTRG_RST;     			/**< LKTRG  reset value */
   e:	b342      	st.w      	r2, (r3, 0x8)
		EPWM->CNTR0=PWM_CNTR0_RST;     			/**< CNTR0  reset value */
  10:	b343      	st.w      	r2, (r3, 0xc)
		EPWM->CNTBR0=PWM_CNTBR0_RST;     		/**< CNTBR0  reset value */
  12:	b344      	st.w      	r2, (r3, 0x10)
		EPWM->PCNTR0=PWM_PCNTR0_RST;     		/**< PCNTR0  reset value */
  14:	b345      	st.w      	r2, (r3, 0x14)
		EPWM->SLPCNTR0=PWM_SLPCNTR0_RST;     	/**< SLPCNTR0  reset value */
  16:	b346      	st.w      	r2, (r3, 0x18)
		EPWM->CNTR1=PWM_CNTR1_RST;     			/**< CNTR1  reset value */
  18:	b347      	st.w      	r2, (r3, 0x1c)
		EPWM->CNTBR1=PWM_CNTBR1_RST;     		/**< CNTBR1  reset value */
  1a:	b348      	st.w      	r2, (r3, 0x20)
		EPWM->PCNTR1=PWM_PCNTR1_RST;     		/**< PCNTR1  reset value */
  1c:	b349      	st.w      	r2, (r3, 0x24)
		EPWM->SLPCNTR1=PWM_SLPCNTR1_RST;     	/**< SLPCNTR1  reset value */
  1e:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->CNTR2=PWM_CNTR2_RST;     			/**< CNTR2  reset value */
  20:	b34b      	st.w      	r2, (r3, 0x2c)
		EPWM->CNTBR2=PWM_CNTBR2_RST;     		/**< CNTBR2  reset value */
  22:	b34c      	st.w      	r2, (r3, 0x30)
		EPWM->PCNTR2=PWM_PCNTR2_RST;     		/**< PCNTR2  reset value */
  24:	b34d      	st.w      	r2, (r3, 0x34)
		EPWM->SLPCNTR2=PWM_SLPCNTR2_RST;     	/**< SLPCNTR2  reset value */
  26:	b34e      	st.w      	r2, (r3, 0x38)
		EPWM->CMPAR0=PWM_CMPAR0_RST;     		/**< CMPAR0  reset value */
  28:	b34f      	st.w      	r2, (r3, 0x3c)
		EPWM->PCMPAR0=PWM_PCMPAR0_RST;     		/**< PCMPAR0  reset value */
  2a:	b350      	st.w      	r2, (r3, 0x40)
		EPWM->SLPCMPAR0=PWM_SLPCMPAR0_RST;     	/**< SLPCMPAR0  reset value */
  2c:	b351      	st.w      	r2, (r3, 0x44)
		EPWM->CMPBR0=PWM_CMPBR0_RST;     		/**< CMPBR0  reset value */
  2e:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->PCMPBR0=PWM_PCMPBR0_RST;     		/**< PCMPBR0  reset value */
  30:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->SLPCMPBR0=PWM_SLPCMPBR0_RST;     	/**< SLPCMPBR0  reset value */
  32:	b354      	st.w      	r2, (r3, 0x50)
		EPWM->CMPAR1=PWM_CMPAR1_RST;     		/**< CMPAR1  reset value */
  34:	b355      	st.w      	r2, (r3, 0x54)
		EPWM->PCMPAR1=PWM_PCMPAR1_RST;     		/**< PCMPAR1  reset value */
  36:	b356      	st.w      	r2, (r3, 0x58)
		EPWM->SLPCMPAR1=PWM_SLPCMPAR1_RST;     	/**< SLPCMPAR1  reset value */
  38:	b357      	st.w      	r2, (r3, 0x5c)
		EPWM->CMPBR1=PWM_CMPBR1_RST;     		/**< CMPBR1  reset value */
  3a:	b358      	st.w      	r2, (r3, 0x60)
		EPWM->PCMPBR1=PWM_PCMPBR1_RST;     		/**< PCMPBR1 reset value */
  3c:	b359      	st.w      	r2, (r3, 0x64)
		EPWM->SLPCMPBR1=PWM_SLPCMPBR1_RST;     	/**< SLPCMPBR1  reset value */
  3e:	b35a      	st.w      	r2, (r3, 0x68)
		EPWM->CMPAR2=PWM_CMPAR2_RST;     		/**< CMPAR2  reset value */
  40:	b35b      	st.w      	r2, (r3, 0x6c)
		EPWM->PCMPAR2=PWM_PCMPAR2_RST;    		/**< PCMPAR2  reset value */
  42:	b35c      	st.w      	r2, (r3, 0x70)
		EPWM->SLPCMPAR2=PWM_SLPCMPAR2_RST;     	/**< SLPCMPAR2  reset value */
  44:	b35d      	st.w      	r2, (r3, 0x74)
		EPWM->CMPBR2=PWM_CMPBR2_RST;     		/**< CMPBR2  reset value */
  46:	b35e      	st.w      	r2, (r3, 0x78)
		EPWM->PCMPBR2=PWM_PCMPBR2_RST;     		/**< PCMPBR2 reset value */
  48:	b35f      	st.w      	r2, (r3, 0x7c)
		EPWM->SLPCMPBR2=PWM_SLPCMPBR2_RST;     	/**< SLPCMPBR2  reset value */
  4a:	237f      	addi      	r3, 128
  4c:	b340      	st.w      	r2, (r3, 0)
		EPWM->WGCR0=PWM_WGCR0_RST;     			/**< WGCR0  reset value */
  4e:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->WGCR1=PWM_WGCR1_RST;     			/**< WGCR1  reset value */
  50:	b342      	st.w      	r2, (r3, 0x8)
		EPWM->WGCR2=PWM_WGCR2_RST;     			/**< WGCR2  reset value */
  52:	b343      	st.w      	r2, (r3, 0xc)
		EPWM->OUTCR0=PWM_OUTCR0_RST;     		/**< OUTCR0  reset value */
  54:	b344      	st.w      	r2, (r3, 0x10)
		EPWM->OUTCR1=PWM_OUTCR1_RST;     		/**< OUTCR1  reset value */
  56:	b345      	st.w      	r2, (r3, 0x14)
		EPWM->OUTCR2=PWM_OUTCR2_RST;     		/**< OUTCR2  reset value */
  58:	b346      	st.w      	r2, (r3, 0x18)
		EPWM->CFCR0=PWM_CFCR0_RST;     			/**< CFCR0  reset value */
  5a:	b347      	st.w      	r2, (r3, 0x1c)
		EPWM->CFCR1=PWM_CFCR1_RST;     			/**< CFCR1  reset value */
  5c:	b348      	st.w      	r2, (r3, 0x20)
		EPWM->CFCR2=PWM_CFCR2_RST;     			/**< CFCR2  reset value */
  5e:	b349      	st.w      	r2, (r3, 0x24)
		EPWM->EMR=PWM_EMR_RST;     				/**< EMR  reset value */
  60:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->SLCON=PWM_SLCON_RST;     			/**< SLCON  reset value */
  62:	b34b      	st.w      	r2, (r3, 0x2c)
		EPWM->SLSTEP0=PWM_SLSTEP0_RST;     		/**< SLSTEP0  reset value */
  64:	b34c      	st.w      	r2, (r3, 0x30)
		EPWM->SLSTEP1=PWM_SLSTEP1_RST;     		/**< SLSTEP1 reset value */
  66:	b34d      	st.w      	r2, (r3, 0x34)
		EPWM->IER=PWM_IER_RST;     				/**< IER reset value */
  68:	b34e      	st.w      	r2, (r3, 0x38)
		EPWM->ICR=PWM_ICR_RST;     				/**< ICR reset value */
  6a:	b34f      	st.w      	r2, (r3, 0x3c)
		EPWM->RISR=PWM_RISR_RST;     			/**< RISR reset value */
  6c:	b350      	st.w      	r2, (r3, 0x40)
		EPWM->MISR=PWM_MISR_RST;     			/**< MISR reset value */
  6e:	b351      	st.w      	r2, (r3, 0x44)
		EPWM->EXTRG0=PWM_EXTRG0_RST;     		/**< EXTRG0 reset value */
  70:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG1=PWM_EXTRG1_RST;     		/**< EXTRG1 reset value */
  72:	b353      	st.w      	r2, (r3, 0x4c)
}
  74:	783c      	rts
  76:	0000      	bkpt
  78:	00000000 	.long	0x00000000

0000007c <EPWM_IO_Init>:
//PWM_EP4(0->PA1.5)
//ReturnValue:NONE
/*************************************************************/
void EPWM_IO_Init(EPWM_IO_MODE_TypeDef  EPWM_IO_MODE_X , U8_T EPWM_IO_G )
{
	if(EPWM_IO_MODE_X==PWM_X0)
  7c:	3840      	cmpnei      	r0, 0
  7e:	083a      	bt      	0xf2	// f2 <EPWM_IO_Init+0x76>
	{
		if(EPWM_IO_G==0)
  80:	3940      	cmpnei      	r1, 0
  82:	0809      	bt      	0x94	// 94 <EPWM_IO_Init+0x18>
		{
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000040;										//EPWM0_X(PA0.09->AF1)
  84:	1367      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
  86:	31f0      	movi      	r1, 240
  88:	9340      	ld.w      	r2, (r3, 0)
  8a:	9261      	ld.w      	r3, (r2, 0x4)
  8c:	68c5      	andn      	r3, r1
  8e:	3ba6      	bseti      	r3, r3, 6
		{
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x07000000;										//EPWM0_Y(PA0.14->AF4)
		}
		else if(EPWM_IO_G==3)
		{
			GPIOA0->CONHR=(GPIOA0->CONHR & 0X0FFFFFFF)|0x50000000;										//EPWM0_Y(PA0.15->AF2)
  90:	b261      	st.w      	r3, (r2, 0x4)
  92:	043c      	br      	0x10a	// 10a <EPWM_IO_Init+0x8e>
		else if(EPWM_IO_G==1)
  94:	3941      	cmpnei      	r1, 1
  96:	080b      	bt      	0xac	// ac <EPWM_IO_Init+0x30>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0XF0FFFFFF)|0x06000000;										//EPWM0_X(PA0.06->AF3)
  98:	1362      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
  9a:	32f0      	movi      	r2, 240
  9c:	9320      	ld.w      	r1, (r3, 0)
  9e:	9160      	ld.w      	r3, (r1, 0)
  a0:	4254      	lsli      	r2, r2, 20
  a2:	68c9      	andn      	r3, r2
  a4:	3bb9      	bseti      	r3, r3, 25
  a6:	3bba      	bseti      	r3, r3, 26
	}
	else if(EPWM_IO_MODE_X==PWM_EP4)
	{
		if(EPWM_IO_G==0)
		{
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00600000;										//EPWM_EP4(PA1.5->AF3)
  a8:	b160      	st.w      	r3, (r1, 0)
		}
	}
}
  aa:	0430      	br      	0x10a	// 10a <EPWM_IO_Init+0x8e>
		else if(EPWM_IO_G==2)
  ac:	3942      	cmpnei      	r1, 2
  ae:	080a      	bt      	0xc2	// c2 <EPWM_IO_Init+0x46>
			GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFF0FFF)|0x00005000;										//EPWM0_X(PC0.3->AF2)
  b0:	127d      	lrw      	r3, 0	// 224 <EPWM_IO_Init+0x1a8>
  b2:	32f0      	movi      	r2, 240
  b4:	9320      	ld.w      	r1, (r3, 0)
  b6:	9160      	ld.w      	r3, (r1, 0)
  b8:	4248      	lsli      	r2, r2, 8
  ba:	68c9      	andn      	r3, r2
  bc:	3bac      	bseti      	r3, r3, 12
  be:	3bae      	bseti      	r3, r3, 14
  c0:	07f4      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
		else if(EPWM_IO_G==3)
  c2:	3943      	cmpnei      	r1, 3
  c4:	080b      	bt      	0xda	// da <EPWM_IO_Init+0x5e>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFFF0FFFF)|0x00070000;										//EPWM0_X(PA1.4->AF4)
  c6:	1279      	lrw      	r3, 0	// 228 <EPWM_IO_Init+0x1ac>
  c8:	32f0      	movi      	r2, 240
  ca:	9320      	ld.w      	r1, (r3, 0)
  cc:	424c      	lsli      	r2, r2, 12
  ce:	9160      	ld.w      	r3, (r1, 0)
  d0:	68c9      	andn      	r3, r2
  d2:	32e0      	movi      	r2, 224
  d4:	424b      	lsli      	r2, r2, 11
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00700000;										//EPWM1_X(PA1.5->AF4)
  d6:	6cc8      	or      	r3, r2
  d8:	07e8      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
		else if(EPWM_IO_G==4)
  da:	3944      	cmpnei      	r1, 4
  dc:	0817      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFF0FFFFF)|0x00700000;										//EPWM0_X(PA0.13->AF4)
  de:	1271      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
  e0:	32f0      	movi      	r2, 240
  e2:	9320      	ld.w      	r1, (r3, 0)
  e4:	4250      	lsli      	r2, r2, 16
  e6:	9161      	ld.w      	r3, (r1, 0x4)
  e8:	68c9      	andn      	r3, r2
  ea:	32e0      	movi      	r2, 224
  ec:	424f      	lsli      	r2, r2, 15
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x07000000;										//EPWM0_Y(PA0.14->AF4)
  ee:	6cc8      	or      	r3, r2
  f0:	040c      	br      	0x108	// 108 <EPWM_IO_Init+0x8c>
	else if(EPWM_IO_MODE_X==PWM_Y0)
  f2:	3841      	cmpnei      	r0, 1
  f4:	082c      	bt      	0x14c	// 14c <EPWM_IO_Init+0xd0>
		if(EPWM_IO_G==0)
  f6:	3940      	cmpnei      	r1, 0
  f8:	080a      	bt      	0x10c	// 10c <EPWM_IO_Init+0x90>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000400;										//EPWM0_Y(PA0.10->AF1)
  fa:	126a      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
  fc:	32f0      	movi      	r2, 240
  fe:	9320      	ld.w      	r1, (r3, 0)
 100:	9161      	ld.w      	r3, (r1, 0x4)
 102:	4244      	lsli      	r2, r2, 4
 104:	68c9      	andn      	r3, r2
 106:	3baa      	bseti      	r3, r3, 10
 108:	b161      	st.w      	r3, (r1, 0x4)
}
 10a:	783c      	rts
		else if(EPWM_IO_G==1)
 10c:	3941      	cmpnei      	r1, 1
 10e:	080a      	bt      	0x122	// 122 <EPWM_IO_Init+0xa6>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0XFF0FFFFF)|0x00600000;										//EPWM0_Y(PA0.05->AF3)
 110:	1264      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00600000;										//EPWM_EP4(PA1.5->AF3)
 112:	9320      	ld.w      	r1, (r3, 0)
 114:	32f0      	movi      	r2, 240
 116:	9160      	ld.w      	r3, (r1, 0)
 118:	4250      	lsli      	r2, r2, 16
 11a:	68c9      	andn      	r3, r2
 11c:	3bb5      	bseti      	r3, r3, 21
 11e:	3bb6      	bseti      	r3, r3, 22
 120:	07c4      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
		else if(EPWM_IO_G==2)
 122:	3942      	cmpnei      	r1, 2
 124:	080a      	bt      	0x138	// 138 <EPWM_IO_Init+0xbc>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x07000000;										//EPWM0_Y(PA0.14->AF4)
 126:	117f      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 128:	32f0      	movi      	r2, 240
 12a:	9320      	ld.w      	r1, (r3, 0)
 12c:	4254      	lsli      	r2, r2, 20
 12e:	9161      	ld.w      	r3, (r1, 0x4)
 130:	68c9      	andn      	r3, r2
 132:	32e0      	movi      	r2, 224
 134:	4253      	lsli      	r2, r2, 19
 136:	07dc      	br      	0xee	// ee <EPWM_IO_Init+0x72>
		else if(EPWM_IO_G==3)
 138:	3943      	cmpnei      	r1, 3
 13a:	0be8      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0X0FFFFFFF)|0x50000000;										//EPWM0_Y(PA0.15->AF2)
 13c:	1179      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 13e:	9340      	ld.w      	r2, (r3, 0)
 140:	9261      	ld.w      	r3, (r2, 0x4)
 142:	4364      	lsli      	r3, r3, 4
 144:	4b64      	lsri      	r3, r3, 4
 146:	3bbc      	bseti      	r3, r3, 28
 148:	3bbe      	bseti      	r3, r3, 30
 14a:	07a3      	br      	0x90	// 90 <EPWM_IO_Init+0x14>
	else if(EPWM_IO_MODE_X==PWM_X1)
 14c:	3842      	cmpnei      	r0, 2
 14e:	082c      	bt      	0x1a6	// 1a6 <EPWM_IO_Init+0x12a>
		if(EPWM_IO_G==0)
 150:	3940      	cmpnei      	r1, 0
 152:	0809      	bt      	0x164	// 164 <EPWM_IO_Init+0xe8>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0X0FFFFFFF)|0x40000000;										//EPWM1_X(PA0.7->AF1)
 154:	1173      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 156:	9340      	ld.w      	r2, (r3, 0)
 158:	9260      	ld.w      	r3, (r2, 0)
 15a:	4364      	lsli      	r3, r3, 4
 15c:	4b64      	lsri      	r3, r3, 4
 15e:	3bbe      	bseti      	r3, r3, 30
			GPIOD0->CONLR=(GPIOD0->CONLR & 0XFFFFFFF0)|0x00000006;										//EPWM_EP1(PD0.0->AF3)
 160:	b260      	st.w      	r3, (r2, 0)
 162:	07d4      	br      	0x10a	// 10a <EPWM_IO_Init+0x8e>
		else if(EPWM_IO_G==1)
 164:	3941      	cmpnei      	r1, 1
 166:	080a      	bt      	0x17a	// 17a <EPWM_IO_Init+0xfe>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00007000;										//EPWM1_X(PA0.11->AF4)
 168:	116e      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 16a:	32f0      	movi      	r2, 240
 16c:	9320      	ld.w      	r1, (r3, 0)
 16e:	4248      	lsli      	r2, r2, 8
 170:	9161      	ld.w      	r3, (r1, 0x4)
 172:	68c9      	andn      	r3, r2
 174:	32e0      	movi      	r2, 224
 176:	4247      	lsli      	r2, r2, 7
 178:	07bb      	br      	0xee	// ee <EPWM_IO_Init+0x72>
		else if(EPWM_IO_G==2)
 17a:	3942      	cmpnei      	r1, 2
 17c:	080a      	bt      	0x190	// 190 <EPWM_IO_Init+0x114>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFF0FFFFF)|0x00500000;										//EPWM1_X(PA0.13->AF2)
 17e:	1169      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 180:	32f0      	movi      	r2, 240
 182:	9320      	ld.w      	r1, (r3, 0)
 184:	9161      	ld.w      	r3, (r1, 0x4)
 186:	4250      	lsli      	r2, r2, 16
 188:	68c9      	andn      	r3, r2
 18a:	3bb4      	bseti      	r3, r3, 20
 18c:	3bb6      	bseti      	r3, r3, 22
 18e:	07bd      	br      	0x108	// 108 <EPWM_IO_Init+0x8c>
		else if(EPWM_IO_G==3)
 190:	3943      	cmpnei      	r1, 3
 192:	0bbc      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00700000;										//EPWM1_X(PA1.5->AF4)
 194:	1165      	lrw      	r3, 0	// 228 <EPWM_IO_Init+0x1ac>
 196:	32f0      	movi      	r2, 240
 198:	9320      	ld.w      	r1, (r3, 0)
 19a:	4250      	lsli      	r2, r2, 16
 19c:	9160      	ld.w      	r3, (r1, 0)
 19e:	68c9      	andn      	r3, r2
 1a0:	32e0      	movi      	r2, 224
 1a2:	424f      	lsli      	r2, r2, 15
 1a4:	0799      	br      	0xd6	// d6 <EPWM_IO_Init+0x5a>
	else if(EPWM_IO_MODE_X==PWM_Y1)
 1a6:	3843      	cmpnei      	r0, 3
 1a8:	0820      	bt      	0x1e8	// 1e8 <EPWM_IO_Init+0x16c>
		if(EPWM_IO_G==0)
 1aa:	3940      	cmpnei      	r1, 0
 1ac:	0808      	bt      	0x1bc	// 1bc <EPWM_IO_Init+0x140>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFFF0)|0x00000004;										//EPWM1_Y(PA0.8->AF1)
 1ae:	107d      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 1b0:	310f      	movi      	r1, 15
 1b2:	9340      	ld.w      	r2, (r3, 0)
 1b4:	9261      	ld.w      	r3, (r2, 0x4)
 1b6:	68c5      	andn      	r3, r1
 1b8:	3ba2      	bseti      	r3, r3, 2
 1ba:	076b      	br      	0x90	// 90 <EPWM_IO_Init+0x14>
		else if(EPWM_IO_G==1)
 1bc:	3941      	cmpnei      	r1, 1
 1be:	080a      	bt      	0x1d2	// 1d2 <EPWM_IO_Init+0x156>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x05000000;										//EPWM1_Y(PA0.14->AF2)
 1c0:	1078      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 1c2:	32f0      	movi      	r2, 240
 1c4:	9320      	ld.w      	r1, (r3, 0)
 1c6:	9161      	ld.w      	r3, (r1, 0x4)
 1c8:	4254      	lsli      	r2, r2, 20
 1ca:	68c9      	andn      	r3, r2
 1cc:	3bb8      	bseti      	r3, r3, 24
 1ce:	3bba      	bseti      	r3, r3, 26
 1d0:	079c      	br      	0x108	// 108 <EPWM_IO_Init+0x8c>
		else if(EPWM_IO_G==2)
 1d2:	3942      	cmpnei      	r1, 2
 1d4:	0b9b      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00070000;										//EPWM1_Y(PA0.12->AF4)
 1d6:	1073      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 1d8:	32f0      	movi      	r2, 240
 1da:	9320      	ld.w      	r1, (r3, 0)
 1dc:	424c      	lsli      	r2, r2, 12
 1de:	9161      	ld.w      	r3, (r1, 0x4)
 1e0:	68c9      	andn      	r3, r2
 1e2:	32e0      	movi      	r2, 224
 1e4:	424b      	lsli      	r2, r2, 11
 1e6:	0784      	br      	0xee	// ee <EPWM_IO_Init+0x72>
	else if(EPWM_IO_MODE_X==PWM_X2)
 1e8:	3844      	cmpnei      	r0, 4
 1ea:	0827      	bt      	0x238	// 238 <EPWM_IO_Init+0x1bc>
		if(EPWM_IO_G==0)
 1ec:	3940      	cmpnei      	r1, 0
 1ee:	0809      	bt      	0x200	// 200 <EPWM_IO_Init+0x184>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0XFF0FFFFF)|0x00400000;										//EPWM2_X(PA0.5->AF1)
 1f0:	106c      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 1f2:	32f0      	movi      	r2, 240
 1f4:	9320      	ld.w      	r1, (r3, 0)
 1f6:	9160      	ld.w      	r3, (r1, 0)
 1f8:	4250      	lsli      	r2, r2, 16
 1fa:	68c9      	andn      	r3, r2
 1fc:	3bb6      	bseti      	r3, r3, 22
 1fe:	0755      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
		else if(EPWM_IO_G==1)
 200:	3941      	cmpnei      	r1, 1
 202:	0809      	bt      	0x214	// 214 <EPWM_IO_Init+0x198>
			GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFFFF0F)|0x00000070;										//EPWM2_X(PC0.1->AF4)
 204:	1068      	lrw      	r3, 0	// 224 <EPWM_IO_Init+0x1a8>
 206:	31f0      	movi      	r1, 240
 208:	9340      	ld.w      	r2, (r3, 0)
 20a:	9260      	ld.w      	r3, (r2, 0)
 20c:	68c5      	andn      	r3, r1
 20e:	3170      	movi      	r1, 112
 210:	6cc4      	or      	r3, r1
 212:	07a7      	br      	0x160	// 160 <EPWM_IO_Init+0xe4>
		else if(EPWM_IO_G==2)
 214:	3942      	cmpnei      	r1, 2
 216:	0b7a      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00005000;										//EPWM2_X(PA0.11->AF2)
 218:	1062      	lrw      	r3, 0	// 220 <EPWM_IO_Init+0x1a4>
 21a:	32f0      	movi      	r2, 240
 21c:	9320      	ld.w      	r1, (r3, 0)
 21e:	0407      	br      	0x22c	// 22c <EPWM_IO_Init+0x1b0>
	...
 22c:	9161      	ld.w      	r3, (r1, 0x4)
 22e:	4248      	lsli      	r2, r2, 8
 230:	68c9      	andn      	r3, r2
 232:	3bac      	bseti      	r3, r3, 12
 234:	3bae      	bseti      	r3, r3, 14
 236:	0769      	br      	0x108	// 108 <EPWM_IO_Init+0x8c>
	else if(EPWM_IO_MODE_X==PWM_Y2)
 238:	3845      	cmpnei      	r0, 5
 23a:	0816      	bt      	0x266	// 266 <EPWM_IO_Init+0x1ea>
		if(EPWM_IO_G==0)
 23c:	3940      	cmpnei      	r1, 0
 23e:	0809      	bt      	0x250	// 250 <EPWM_IO_Init+0x1d4>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0XF0FFFFFF)|0x04000000;										//EPWM2_Y(PA0.6->AF1)
 240:	1365      	lrw      	r3, 0	// 3d4 <EPWM_PX_PY_Configure+0xde>
 242:	32f0      	movi      	r2, 240
 244:	9320      	ld.w      	r1, (r3, 0)
 246:	9160      	ld.w      	r3, (r1, 0)
 248:	4254      	lsli      	r2, r2, 20
 24a:	68c9      	andn      	r3, r2
 24c:	3bba      	bseti      	r3, r3, 26
 24e:	072d      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
		else if(EPWM_IO_G==1)
 250:	3941      	cmpnei      	r1, 1
 252:	0b5c      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00050000;										//EPWM2_Y(PA0.12->AF2)
 254:	1360      	lrw      	r3, 0	// 3d4 <EPWM_PX_PY_Configure+0xde>
 256:	32f0      	movi      	r2, 240
 258:	9320      	ld.w      	r1, (r3, 0)
 25a:	9161      	ld.w      	r3, (r1, 0x4)
 25c:	424c      	lsli      	r2, r2, 12
 25e:	68c9      	andn      	r3, r2
 260:	3bb0      	bseti      	r3, r3, 16
 262:	3bb2      	bseti      	r3, r3, 18
 264:	0752      	br      	0x108	// 108 <EPWM_IO_Init+0x8c>
	else if(EPWM_IO_MODE_X==PWM_EP0)																	
 266:	3846      	cmpnei      	r0, 6
 268:	080c      	bt      	0x280	// 280 <EPWM_IO_Init+0x204>
		if(EPWM_IO_G==0)
 26a:	3940      	cmpnei      	r1, 0
 26c:	0b4f      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFF0FF)|0x00000500;										//EPWM2_Y(PA0.2->AF2)
 26e:	127a      	lrw      	r3, 0	// 3d4 <EPWM_PX_PY_Configure+0xde>
 270:	32f0      	movi      	r2, 240
 272:	9320      	ld.w      	r1, (r3, 0)
 274:	9160      	ld.w      	r3, (r1, 0)
 276:	4244      	lsli      	r2, r2, 4
 278:	68c9      	andn      	r3, r2
 27a:	3ba8      	bseti      	r3, r3, 8
 27c:	3baa      	bseti      	r3, r3, 10
 27e:	0715      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
	else if(EPWM_IO_MODE_X==PWM_EP1)
 280:	3847      	cmpnei      	r0, 7
 282:	080b      	bt      	0x298	// 298 <EPWM_IO_Init+0x21c>
		if(EPWM_IO_G==0)
 284:	3940      	cmpnei      	r1, 0
 286:	0b42      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOD0->CONLR=(GPIOD0->CONLR & 0XFFFFFFF0)|0x00000006;										//EPWM_EP1(PD0.0->AF3)
 288:	1274      	lrw      	r3, 0	// 3d8 <EPWM_PX_PY_Configure+0xe2>
 28a:	310f      	movi      	r1, 15
 28c:	9340      	ld.w      	r2, (r3, 0)
 28e:	9260      	ld.w      	r3, (r2, 0)
 290:	68c5      	andn      	r3, r1
 292:	3ba1      	bseti      	r3, r3, 1
 294:	3ba2      	bseti      	r3, r3, 2
 296:	0765      	br      	0x160	// 160 <EPWM_IO_Init+0xe4>
	else if(EPWM_IO_MODE_X==PWM_EP2)
 298:	3848      	cmpnei      	r0, 8
 29a:	080b      	bt      	0x2b0	// 2b0 <EPWM_IO_Init+0x234>
		if(EPWM_IO_G==0)
 29c:	3940      	cmpnei      	r1, 0
 29e:	0b36      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFFF0FF)|0x00000400;										//EPWM_EP2(PC0.2->AF1)
 2a0:	126f      	lrw      	r3, 0	// 3dc <EPWM_PX_PY_Configure+0xe6>
 2a2:	32f0      	movi      	r2, 240
 2a4:	9320      	ld.w      	r1, (r3, 0)
 2a6:	9160      	ld.w      	r3, (r1, 0)
 2a8:	4244      	lsli      	r2, r2, 4
 2aa:	68c9      	andn      	r3, r2
 2ac:	3baa      	bseti      	r3, r3, 10
 2ae:	06fd      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
	else if(EPWM_IO_MODE_X==PWM_EP3)
 2b0:	3849      	cmpnei      	r0, 9
 2b2:	080b      	bt      	0x2c8	// 2c8 <EPWM_IO_Init+0x24c>
		if(EPWM_IO_G==0)
 2b4:	3940      	cmpnei      	r1, 0
 2b6:	0b2a      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFF0FFF)|0x00004000;										//EPWM_EP3(PC0.3->AF1)
 2b8:	1269      	lrw      	r3, 0	// 3dc <EPWM_PX_PY_Configure+0xe6>
 2ba:	32f0      	movi      	r2, 240
 2bc:	9320      	ld.w      	r1, (r3, 0)
 2be:	9160      	ld.w      	r3, (r1, 0)
 2c0:	4248      	lsli      	r2, r2, 8
 2c2:	68c9      	andn      	r3, r2
 2c4:	3bae      	bseti      	r3, r3, 14
 2c6:	06f1      	br      	0xa8	// a8 <EPWM_IO_Init+0x2c>
	else if(EPWM_IO_MODE_X==PWM_EP4)
 2c8:	384a      	cmpnei      	r0, 10
 2ca:	0b20      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
		if(EPWM_IO_G==0)
 2cc:	3940      	cmpnei      	r1, 0
 2ce:	0b1e      	bt      	0x10a	// 10a <EPWM_IO_Init+0x8e>
			GPIOA1->CONLR=(GPIOA1->CONLR & 0XFF0FFFFF)|0x00600000;										//EPWM_EP4(PA1.5->AF3)
 2d0:	1264      	lrw      	r3, 0	// 3e0 <EPWM_PX_PY_Configure+0xea>
 2d2:	0720      	br      	0x112	// 112 <EPWM_IO_Init+0x96>

000002d4 <EPWM_CONTER_Configure>:
//EPWM_DINM;0~0XFFF
//ReturnValue:NONE
/*************************************************************/  
//EPWM_CLK=PCLK/(2^DIVN)/(DINM+1)
void EPWM_CONTER_Configure(EPWM_CMODE_TypeDef EPWM_ContMode_X , EPWM_Conter_NUM_TypeDef EMP_Conter_X, EPWM_Overflow_Mode_TypeDef EMP_Overflow_Mode_X , U8_T  EPWM_DIVN , U16_T  EPWM_DINM )
{
 2d4:	14c3      	push      	r4-r6
 2d6:	d8ae1006 	ld.h      	r5, (sp, 0xc)
	EPWM->CR |= CKEN;
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2da:	3ab6      	bseti      	r2, r2, 22
 2dc:	6c84      	or      	r2, r1
	EPWM->CR |= CKEN;
 2de:	1282      	lrw      	r4, 0	// 3e4 <EPWM_PX_PY_Configure+0xee>
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2e0:	4528      	lsli      	r1, r5, 8
	EPWM->CR |= CKEN;
 2e2:	9480      	ld.w      	r4, (r4, 0)
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2e4:	6c84      	or      	r2, r1
	EPWM->CR |= CKEN;
 2e6:	94c0      	ld.w      	r6, (r4, 0)
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2e8:	6c08      	or      	r0, r2
 2ea:	4365      	lsli      	r3, r3, 5
	EPWM->CR |= CKEN;
 2ec:	3eb6      	bseti      	r6, r6, 22
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2ee:	6cc0      	or      	r3, r0
	EPWM->CR |= CKEN;
 2f0:	b4c0      	st.w      	r6, (r4, 0)
	EPWM->CR = EPWM_ContMode_X | EMP_Conter_X | EMP_Overflow_Mode_X | (EPWM_DIVN<<5) | (EPWM_DINM<<8) | CKEN ;
 2f2:	b460      	st.w      	r3, (r4, 0)
}
 2f4:	1483      	pop      	r4-r6

000002f6 <EPWM_PX_PY_Configure>:
//ReturnValue:NONE
/*************************************************************/  
void EPWM_PX_PY_Configure(EPWM_PXxOrPYx_TypeDef EPWM_PXxOrPYx , EPWM_StartStopEvent_PxOUT_TypeDef EPWM_StartStopEvent_X , EPWM_PendEvent_PxOUT_TypeDef EPWM_PendEvent_X , 
						EPWM_CentralEvent_PxOUT_TypeDef EPWM_CentralEvent_X , EPWM_EqCMPAEvent_PxOUT_TypeDef EPWM_EqCMPAEvent_X , EPWM_EqCMPBEvent_PxOUT_TypeDef EPWM_EqCMPBEvent_X  ,
						U16_T EPWM_CNTRX , U16_T EPWM_CMPARX , U16_T EPWM_CMPBRX)
{
 2f6:	14c4      	push      	r4-r7
 2f8:	1425      	subi      	sp, sp, 20
 2fa:	b860      	st.w      	r3, (sp, 0)
 2fc:	9869      	ld.w      	r3, (sp, 0x24)
 2fe:	b861      	st.w      	r3, (sp, 0x4)
 300:	986a      	ld.w      	r3, (sp, 0x28)
 302:	b862      	st.w      	r3, (sp, 0x8)
 304:	d86e1018 	ld.h      	r3, (sp, 0x30)
 308:	b863      	st.w      	r3, (sp, 0xc)
	if(EPWM_PXxOrPYx==EPWM_P0X)
 30a:	3840      	cmpnei      	r0, 0
{
 30c:	d86e101a 	ld.h      	r3, (sp, 0x34)
 310:	d88e1016 	ld.h      	r4, (sp, 0x2c)
 314:	b864      	st.w      	r3, (sp, 0x10)
	if(EPWM_PXxOrPYx==EPWM_P0X)
 316:	0823      	bt      	0x35c	// 35c <EPWM_PX_PY_Configure+0x66>
	{
		EPWM->WGCR0&=0XFFFFFC00;
 318:	1113      	lrw      	r0, 0	// 3e4 <EPWM_PX_PY_Configure+0xee>
 31a:	3780      	movi      	r7, 128
 31c:	90c0      	ld.w      	r6, (r0, 0)
 31e:	61d8      	addu      	r7, r6
 320:	9701      	ld.w      	r0, (r7, 0x4)
 322:	11b2      	lrw      	r5, 0x3ff	// 3e8 <EPWM_PX_PY_Configure+0xf2>
 324:	6815      	andn      	r0, r5
 326:	b701      	st.w      	r0, (r7, 0x4)
		EPWM->WGCR0|=(EPWM_StartStopEvent_X<<8)|(EPWM_PendEvent_X<<6)|(EPWM_CentralEvent_X<<4)|(EPWM_EqCMPBEvent_X<<2)|EPWM_EqCMPAEvent_X;
 328:	9862      	ld.w      	r3, (sp, 0x8)
 32a:	4302      	lsli      	r0, r3, 2
 32c:	97a1      	ld.w      	r5, (r7, 0x4)
 32e:	9861      	ld.w      	r3, (sp, 0x4)
 330:	6d4c      	or      	r5, r3
 332:	9860      	ld.w      	r3, (sp, 0)
 334:	6d40      	or      	r5, r0
 336:	4364      	lsli      	r3, r3, 4
 338:	6cd4      	or      	r3, r5
 33a:	4246      	lsli      	r2, r2, 6
 33c:	6cc8      	or      	r3, r2
 33e:	4128      	lsli      	r1, r1, 8
		EPWM->CMPBR0=(0xA5<<24)|EPWM_CMPBRX;
	}
	else if(EPWM_PXxOrPYx==EPWM_P0Y)
	{
		EPWM->WGCR0&=0XFFF003FF;
		EPWM->WGCR0|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 340:	6c4c      	or      	r1, r3
		EPWM->CNTR0=(0xA5<<24)|EPWM_CNTRX;
 342:	33a5      	movi      	r3, 165
 344:	4378      	lsli      	r3, r3, 24
		EPWM->CMPAR0=(0xA5<<24)|EPWM_CMPARX;
 346:	9843      	ld.w      	r2, (sp, 0xc)
 348:	6c8c      	or      	r2, r3
		EPWM->CNTR0=(0xA5<<24)|EPWM_CNTRX;
 34a:	6d0c      	or      	r4, r3
		EPWM->WGCR0|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 34c:	b721      	st.w      	r1, (r7, 0x4)
		EPWM->CNTR0=(0xA5<<24)|EPWM_CNTRX;
 34e:	b683      	st.w      	r4, (r6, 0xc)
		EPWM->CMPAR0=(0xA5<<24)|EPWM_CMPARX;
 350:	b64f      	st.w      	r2, (r6, 0x3c)
		EPWM->CMPBR0=(0xA5<<24)|EPWM_CMPBRX;
 352:	9844      	ld.w      	r2, (sp, 0x10)
 354:	6c8c      	or      	r2, r3
 356:	b652      	st.w      	r2, (r6, 0x48)
		EPWM->WGCR2|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
		EPWM->CNTR2=(0xA5<<24)|EPWM_CNTRX;
		EPWM->CMPAR2=(0xA5<<24)|EPWM_CMPARX;
		EPWM->CMPBR2=(0xA5<<24)|EPWM_CMPBRX;
	}
}
 358:	1405      	addi      	sp, sp, 20
 35a:	1484      	pop      	r4-r7
	else if(EPWM_PXxOrPYx==EPWM_P0Y)
 35c:	3841      	cmpnei      	r0, 1
 35e:	0817      	bt      	0x38c	// 38c <EPWM_PX_PY_Configure+0x96>
		EPWM->WGCR0&=0XFFF003FF;
 360:	1101      	lrw      	r0, 0	// 3e4 <EPWM_PX_PY_Configure+0xee>
 362:	3780      	movi      	r7, 128
 364:	90c0      	ld.w      	r6, (r0, 0)
 366:	61d8      	addu      	r7, r6
 368:	9701      	ld.w      	r0, (r7, 0x4)
 36a:	11a1      	lrw      	r5, 0xffc00	// 3ec <EPWM_PX_PY_Configure+0xf6>
 36c:	6815      	andn      	r0, r5
		EPWM->WGCR0|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 36e:	9861      	ld.w      	r3, (sp, 0x4)
		EPWM->WGCR0&=0XFFF003FF;
 370:	b701      	st.w      	r0, (r7, 0x4)
		EPWM->WGCR0|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 372:	9701      	ld.w      	r0, (r7, 0x4)
 374:	43aa      	lsli      	r5, r3, 10
 376:	9862      	ld.w      	r3, (sp, 0x8)
 378:	6d40      	or      	r5, r0
 37a:	430c      	lsli      	r0, r3, 12
 37c:	9860      	ld.w      	r3, (sp, 0)
 37e:	6c14      	or      	r0, r5
 380:	436e      	lsli      	r3, r3, 14
 382:	6cc0      	or      	r3, r0
 384:	4250      	lsli      	r2, r2, 16
 386:	6cc8      	or      	r3, r2
 388:	4132      	lsli      	r1, r1, 18
 38a:	07db      	br      	0x340	// 340 <EPWM_PX_PY_Configure+0x4a>
	else if(EPWM_PXxOrPYx==EPWM_P1X)
 38c:	3842      	cmpnei      	r0, 2
 38e:	0831      	bt      	0x3f0	// 3f0 <EPWM_PX_PY_Configure+0xfa>
		EPWM->WGCR1&=0XFFFFFC00;
 390:	1015      	lrw      	r0, 0	// 3e4 <EPWM_PX_PY_Configure+0xee>
 392:	3780      	movi      	r7, 128
 394:	90c0      	ld.w      	r6, (r0, 0)
 396:	61d8      	addu      	r7, r6
 398:	9702      	ld.w      	r0, (r7, 0x8)
 39a:	10b4      	lrw      	r5, 0x3ff	// 3e8 <EPWM_PX_PY_Configure+0xf2>
 39c:	6815      	andn      	r0, r5
 39e:	b702      	st.w      	r0, (r7, 0x8)
		EPWM->WGCR1|=(EPWM_StartStopEvent_X<<8)|(EPWM_PendEvent_X<<6)|(EPWM_CentralEvent_X<<4)|(EPWM_EqCMPBEvent_X<<2)|EPWM_EqCMPAEvent_X;
 3a0:	9862      	ld.w      	r3, (sp, 0x8)
 3a2:	97a2      	ld.w      	r5, (r7, 0x8)
 3a4:	4302      	lsli      	r0, r3, 2
 3a6:	9861      	ld.w      	r3, (sp, 0x4)
 3a8:	6cd4      	or      	r3, r5
 3aa:	6d4f      	mov      	r5, r3
 3ac:	9860      	ld.w      	r3, (sp, 0)
 3ae:	6d40      	or      	r5, r0
 3b0:	4364      	lsli      	r3, r3, 4
 3b2:	6cd4      	or      	r3, r5
 3b4:	4246      	lsli      	r2, r2, 6
 3b6:	6cc8      	or      	r3, r2
 3b8:	4128      	lsli      	r1, r1, 8
		EPWM->WGCR1|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 3ba:	6c4c      	or      	r1, r3
		EPWM->CNTR1=(0xA5<<24)|EPWM_CNTRX;
 3bc:	33a5      	movi      	r3, 165
 3be:	4378      	lsli      	r3, r3, 24
		EPWM->CMPAR1=(0xA5<<24)|EPWM_CMPARX;
 3c0:	9843      	ld.w      	r2, (sp, 0xc)
 3c2:	6c8c      	or      	r2, r3
		EPWM->CNTR1=(0xA5<<24)|EPWM_CNTRX;
 3c4:	6d0c      	or      	r4, r3
		EPWM->WGCR1|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 3c6:	b722      	st.w      	r1, (r7, 0x8)
		EPWM->CNTR1=(0xA5<<24)|EPWM_CNTRX;
 3c8:	b687      	st.w      	r4, (r6, 0x1c)
		EPWM->CMPAR1=(0xA5<<24)|EPWM_CMPARX;
 3ca:	b655      	st.w      	r2, (r6, 0x54)
		EPWM->CMPBR1=(0xA5<<24)|EPWM_CMPBRX;
 3cc:	9844      	ld.w      	r2, (sp, 0x10)
 3ce:	6c8c      	or      	r2, r3
 3d0:	b658      	st.w      	r2, (r6, 0x60)
 3d2:	07c3      	br      	0x358	// 358 <EPWM_PX_PY_Configure+0x62>
	...
 3e8:	000003ff 	.long	0x000003ff
 3ec:	000ffc00 	.long	0x000ffc00
	else if(EPWM_PXxOrPYx==EPWM_P1Y)
 3f0:	3843      	cmpnei      	r0, 3
 3f2:	0817      	bt      	0x420	// 420 <EPWM_PX_PY_Configure+0x12a>
		EPWM->WGCR1&=0XFFF003FF;
 3f4:	1303      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 3f6:	3780      	movi      	r7, 128
 3f8:	90c0      	ld.w      	r6, (r0, 0)
 3fa:	61d8      	addu      	r7, r6
 3fc:	9702      	ld.w      	r0, (r7, 0x8)
 3fe:	13a2      	lrw      	r5, 0xffc00	// 584 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x3a>
 400:	6815      	andn      	r0, r5
		EPWM->WGCR1|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 402:	9861      	ld.w      	r3, (sp, 0x4)
		EPWM->WGCR1&=0XFFF003FF;
 404:	b702      	st.w      	r0, (r7, 0x8)
		EPWM->WGCR1|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 406:	9702      	ld.w      	r0, (r7, 0x8)
 408:	43aa      	lsli      	r5, r3, 10
 40a:	9862      	ld.w      	r3, (sp, 0x8)
 40c:	6d40      	or      	r5, r0
 40e:	430c      	lsli      	r0, r3, 12
 410:	9860      	ld.w      	r3, (sp, 0)
 412:	6c14      	or      	r0, r5
 414:	436e      	lsli      	r3, r3, 14
 416:	6cc0      	or      	r3, r0
 418:	4250      	lsli      	r2, r2, 16
 41a:	6cc8      	or      	r3, r2
 41c:	4132      	lsli      	r1, r1, 18
 41e:	07ce      	br      	0x3ba	// 3ba <EPWM_PX_PY_Configure+0xc4>
	else if(EPWM_PXxOrPYx==EPWM_P2X)
 420:	3844      	cmpnei      	r0, 4
 422:	0823      	bt      	0x468	// 468 <EPWM_PX_PY_Configure+0x172>
		EPWM->WGCR2&=0XFFFFFC00;
 424:	1217      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 426:	3780      	movi      	r7, 128
 428:	90c0      	ld.w      	r6, (r0, 0)
 42a:	61d8      	addu      	r7, r6
 42c:	9703      	ld.w      	r0, (r7, 0xc)
 42e:	12b7      	lrw      	r5, 0x3ff	// 588 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x3e>
 430:	6815      	andn      	r0, r5
 432:	b703      	st.w      	r0, (r7, 0xc)
		EPWM->WGCR2|=(EPWM_StartStopEvent_X<<8)|(EPWM_PendEvent_X<<6)|(EPWM_CentralEvent_X<<4)|(EPWM_EqCMPBEvent_X<<2)|EPWM_EqCMPAEvent_X;
 434:	9862      	ld.w      	r3, (sp, 0x8)
 436:	97a3      	ld.w      	r5, (r7, 0xc)
 438:	4302      	lsli      	r0, r3, 2
 43a:	9861      	ld.w      	r3, (sp, 0x4)
 43c:	6cd4      	or      	r3, r5
 43e:	6d4f      	mov      	r5, r3
 440:	9860      	ld.w      	r3, (sp, 0)
 442:	6d40      	or      	r5, r0
 444:	4364      	lsli      	r3, r3, 4
 446:	6cd4      	or      	r3, r5
 448:	4246      	lsli      	r2, r2, 6
 44a:	6cc8      	or      	r3, r2
 44c:	4128      	lsli      	r1, r1, 8
 44e:	6c4c      	or      	r1, r3
		EPWM->CNTR2=(0xA5<<24)|EPWM_CNTRX;
 450:	33a5      	movi      	r3, 165
 452:	4378      	lsli      	r3, r3, 24
		EPWM->CMPAR2=(0xA5<<24)|EPWM_CMPARX;
 454:	9843      	ld.w      	r2, (sp, 0xc)
 456:	6c8c      	or      	r2, r3
		EPWM->CNTR2=(0xA5<<24)|EPWM_CNTRX;
 458:	6d0c      	or      	r4, r3
		EPWM->WGCR2|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 45a:	b723      	st.w      	r1, (r7, 0xc)
		EPWM->CNTR2=(0xA5<<24)|EPWM_CNTRX;
 45c:	b68b      	st.w      	r4, (r6, 0x2c)
		EPWM->CMPAR2=(0xA5<<24)|EPWM_CMPARX;
 45e:	b65b      	st.w      	r2, (r6, 0x6c)
		EPWM->CMPBR2=(0xA5<<24)|EPWM_CMPBRX;
 460:	9844      	ld.w      	r2, (sp, 0x10)
 462:	6c8c      	or      	r2, r3
 464:	b65e      	st.w      	r2, (r6, 0x78)
}
 466:	0779      	br      	0x358	// 358 <EPWM_PX_PY_Configure+0x62>
	else if(EPWM_PXxOrPYx==EPWM_P2Y)
 468:	3845      	cmpnei      	r0, 5
 46a:	0b77      	bt      	0x358	// 358 <EPWM_PX_PY_Configure+0x62>
		EPWM->WGCR2&=0XFFF003FF;
 46c:	1205      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 46e:	3780      	movi      	r7, 128
 470:	90c0      	ld.w      	r6, (r0, 0)
 472:	61d8      	addu      	r7, r6
 474:	9703      	ld.w      	r0, (r7, 0xc)
 476:	12a4      	lrw      	r5, 0xffc00	// 584 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x3a>
 478:	6815      	andn      	r0, r5
		EPWM->WGCR2|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 47a:	9861      	ld.w      	r3, (sp, 0x4)
		EPWM->WGCR2&=0XFFF003FF;
 47c:	b703      	st.w      	r0, (r7, 0xc)
		EPWM->WGCR2|=(EPWM_StartStopEvent_X<<18)|(EPWM_PendEvent_X<<16)|(EPWM_CentralEvent_X<<14)|(EPWM_EqCMPBEvent_X<<12)|(EPWM_EqCMPAEvent_X<<10);
 47e:	9703      	ld.w      	r0, (r7, 0xc)
 480:	43aa      	lsli      	r5, r3, 10
 482:	9862      	ld.w      	r3, (sp, 0x8)
 484:	6d40      	or      	r5, r0
 486:	430c      	lsli      	r0, r3, 12
 488:	9860      	ld.w      	r3, (sp, 0)
 48a:	6c14      	or      	r0, r5
 48c:	436e      	lsli      	r3, r3, 14
 48e:	6c0c      	or      	r0, r3
 490:	4250      	lsli      	r2, r2, 16
 492:	6c08      	or      	r0, r2
 494:	4132      	lsli      	r1, r1, 18
 496:	6c40      	or      	r1, r0
 498:	07dc      	br      	0x450	// 450 <EPWM_PX_PY_Configure+0x15a>

0000049a <EPWM_OUTPUT_Configure>:
/*************************************************************/
//RED = DTR x (DIVM + 1) x 2DIVN x PCLK
//FED = DTF x (DIVM + 1) x 2DIVN x PCLK
void EPWM_OUTPUT_Configure(EPWM_PWM_XxOrPWM_Yx_TypeDef EPWM_PWM_XxOrPWM_Yx , EPWM_OUTSEL_TypeDef EPWM_OUTSEL_X , EPWM_X_POLARITY_TypeDef EPWM_X_POLARITY_X 
					, EPWM_Y_POLARITY_TypeDef EPWM_Y_POLARITY_X , EPWM_SRCSEL_TypeDef EPWM_SRCSEL_X , U16_T DTR , U16_T DTF)
{
 49a:	14c3      	push      	r4-r6
	if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X0OrPWM_Y0)
 49c:	3840      	cmpnei      	r0, 0
{
 49e:	98c3      	ld.w      	r6, (sp, 0xc)
 4a0:	d8ae1008 	ld.h      	r5, (sp, 0x10)
 4a4:	d88e100a 	ld.h      	r4, (sp, 0x14)
	if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X0OrPWM_Y0)
 4a8:	080d      	bt      	0x4c2	// 4c2 <EPWM_OUTPUT_Configure+0x28>
	{
		EPWM->OUTCR0=EPWM_OUTSEL_X|EPWM_X_POLARITY_X|EPWM_Y_POLARITY_X|EPWM_SRCSEL_X|(DTR<<6)|(DTF<<15);
 4aa:	448f      	lsli      	r4, r4, 15
 4ac:	6d0c      	or      	r4, r3
 4ae:	6d18      	or      	r4, r6
 4b0:	1114      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 4b2:	6c90      	or      	r2, r4
 4b4:	45a6      	lsli      	r5, r5, 6
 4b6:	9000      	ld.w      	r0, (r0, 0)
 4b8:	6c94      	or      	r2, r5
 4ba:	6c48      	or      	r1, r2
 4bc:	207f      	addi      	r0, 128
 4be:	b024      	st.w      	r1, (r0, 0x10)
	}
	else if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X2OrPWM_Y2)
	{
		EPWM->OUTCR2=EPWM_OUTSEL_X|EPWM_X_POLARITY_X|EPWM_Y_POLARITY_X|EPWM_SRCSEL_X|(DTR<<6)|(DTF<<15);
	}
}
 4c0:	1483      	pop      	r4-r6
	else if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X1OrPWM_Y1)
 4c2:	3841      	cmpnei      	r0, 1
 4c4:	080d      	bt      	0x4de	// 4de <EPWM_OUTPUT_Configure+0x44>
		EPWM->OUTCR1=EPWM_OUTSEL_X|EPWM_X_POLARITY_X|EPWM_Y_POLARITY_X|EPWM_SRCSEL_X|(DTR<<6)|(DTF<<15);
 4c6:	448f      	lsli      	r4, r4, 15
 4c8:	6d0c      	or      	r4, r3
 4ca:	6d18      	or      	r4, r6
 4cc:	110d      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 4ce:	6c90      	or      	r2, r4
 4d0:	45a6      	lsli      	r5, r5, 6
 4d2:	9000      	ld.w      	r0, (r0, 0)
 4d4:	6c94      	or      	r2, r5
 4d6:	6c48      	or      	r1, r2
 4d8:	207f      	addi      	r0, 128
 4da:	b025      	st.w      	r1, (r0, 0x14)
 4dc:	07f2      	br      	0x4c0	// 4c0 <EPWM_OUTPUT_Configure+0x26>
	else if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X2OrPWM_Y2)
 4de:	3842      	cmpnei      	r0, 2
 4e0:	0bf0      	bt      	0x4c0	// 4c0 <EPWM_OUTPUT_Configure+0x26>
		EPWM->OUTCR2=EPWM_OUTSEL_X|EPWM_X_POLARITY_X|EPWM_Y_POLARITY_X|EPWM_SRCSEL_X|(DTR<<6)|(DTF<<15);
 4e2:	448f      	lsli      	r4, r4, 15
 4e4:	6d0c      	or      	r4, r3
 4e6:	6d18      	or      	r4, r6
 4e8:	1106      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 4ea:	6c90      	or      	r2, r4
 4ec:	45a6      	lsli      	r5, r5, 6
 4ee:	9000      	ld.w      	r0, (r0, 0)
 4f0:	6c94      	or      	r2, r5
 4f2:	6c48      	or      	r1, r2
 4f4:	207f      	addi      	r0, 128
 4f6:	b026      	st.w      	r1, (r0, 0x18)
}
 4f8:	07e4      	br      	0x4c0	// 4c0 <EPWM_OUTPUT_Configure+0x26>

000004fa <EPWM_Set_CNTRX_CMPARX_CMPBRX>:
//Load_PCMPARX:0~0xffff
//Load_PCMPBRX:0~0xffff
//ReturnValue:NONE
/*************************************************************/ 
void EPWM_Set_CNTRX_CMPARX_CMPBRX(EPWM_CNTRX_Selected_TypeDef EPWM_CNTRX_Selected , U16_T Load_PCNTRX , U16_T Load_PCMPARX , U16_T Load_PCMPBRX )
{
 4fa:	14c1      	push      	r4
	if(EPWM_CNTRX_Selected==EPWM_CNTR0)
 4fc:	3840      	cmpnei      	r0, 0
 4fe:	080c      	bt      	0x516	// 516 <EPWM_Set_CNTRX_CMPARX_CMPBRX+0x1c>
	{
		EPWM->CNTR0=(0xA5<<24)|Load_PCNTRX;
 500:	34a5      	movi      	r4, 165
 502:	4498      	lsli      	r4, r4, 24
 504:	101f      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 506:	6c50      	or      	r1, r4
 508:	9000      	ld.w      	r0, (r0, 0)
		EPWM->CMPAR0=(0xA5<<24)|Load_PCMPARX;
 50a:	6c90      	or      	r2, r4
		EPWM->CMPBR0=(0xA5<<24)|Load_PCMPBRX;
 50c:	6d0c      	or      	r4, r3
		EPWM->CNTR0=(0xA5<<24)|Load_PCNTRX;
 50e:	b023      	st.w      	r1, (r0, 0xc)
		EPWM->CMPAR0=(0xA5<<24)|Load_PCMPARX;
 510:	b04f      	st.w      	r2, (r0, 0x3c)
		EPWM->CMPBR0=(0xA5<<24)|Load_PCMPBRX;
 512:	b092      	st.w      	r4, (r0, 0x48)
	{
		EPWM->CNTR2=(0xA5<<24)|Load_PCNTRX;
		EPWM->CMPAR2=(0xA5<<24)|Load_PCMPARX;
		EPWM->CMPBR2=(0xA5<<24)|Load_PCMPBRX;
	}
}
 514:	1481      	pop      	r4
	else if(EPWM_CNTRX_Selected==EPWM_CNTR1)
 516:	3841      	cmpnei      	r0, 1
 518:	080c      	bt      	0x530	// 530 <EPWM_Set_CNTRX_CMPARX_CMPBRX+0x36>
		EPWM->CNTR1=(0xA5<<24)|Load_PCNTRX;
 51a:	101a      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 51c:	9080      	ld.w      	r4, (r0, 0)
 51e:	30a5      	movi      	r0, 165
 520:	4018      	lsli      	r0, r0, 24
 522:	6c40      	or      	r1, r0
		EPWM->CMPAR1=(0xA5<<24)|Load_PCMPARX;
 524:	6c80      	or      	r2, r0
		EPWM->CMPBR1=(0xA5<<24)|Load_PCMPBRX;
 526:	6c0c      	or      	r0, r3
		EPWM->CNTR1=(0xA5<<24)|Load_PCNTRX;
 528:	b427      	st.w      	r1, (r4, 0x1c)
		EPWM->CMPAR1=(0xA5<<24)|Load_PCMPARX;
 52a:	b455      	st.w      	r2, (r4, 0x54)
		EPWM->CMPBR1=(0xA5<<24)|Load_PCMPBRX;
 52c:	b418      	st.w      	r0, (r4, 0x60)
 52e:	07f3      	br      	0x514	// 514 <EPWM_Set_CNTRX_CMPARX_CMPBRX+0x1a>
	else if(EPWM_CNTRX_Selected==EPWM_CNTR2)
 530:	3842      	cmpnei      	r0, 2
 532:	0bf1      	bt      	0x514	// 514 <EPWM_Set_CNTRX_CMPARX_CMPBRX+0x1a>
		EPWM->CNTR2=(0xA5<<24)|Load_PCNTRX;
 534:	1013      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 536:	9080      	ld.w      	r4, (r0, 0)
 538:	30a5      	movi      	r0, 165
 53a:	4018      	lsli      	r0, r0, 24
 53c:	6c40      	or      	r1, r0
		EPWM->CMPAR2=(0xA5<<24)|Load_PCMPARX;
 53e:	6c80      	or      	r2, r0
		EPWM->CMPBR2=(0xA5<<24)|Load_PCMPBRX;
 540:	6c0c      	or      	r0, r3
		EPWM->CNTR2=(0xA5<<24)|Load_PCNTRX;
 542:	b42b      	st.w      	r1, (r4, 0x2c)
		EPWM->CMPAR2=(0xA5<<24)|Load_PCMPARX;
 544:	b45b      	st.w      	r2, (r4, 0x6c)
		EPWM->CMPBR2=(0xA5<<24)|Load_PCMPBRX;
 546:	b41e      	st.w      	r0, (r4, 0x78)
}
 548:	07e6      	br      	0x514	// 514 <EPWM_Set_CNTRX_CMPARX_CMPBRX+0x1a>

0000054a <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX>:
//Load_SLPCMPARX:0~0xffff
//Load_SLPCMPBRX:0~0xffff
//ReturnValue:NOE
/*************************************************************/ 
void EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX(EPWM_CNTRX_Selected_TypeDef EPWM_SLPCNTRX_Selected , U16_T Load_SLPCNTRX , U16_T Load_SLPCMPARX , U16_T Load_SLPCMPBRX )
{
 54a:	14c2      	push      	r4-r5
	if(EPWM_SLPCNTRX_Selected==EPWM_SLPCNTR0)
 54c:	3843      	cmpnei      	r0, 3
 54e:	080c      	bt      	0x566	// 566 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x1c>
	{
		EPWM->SLPCNTR0=(0xA5<<24)|Load_SLPCNTRX;
 550:	100c      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 552:	9080      	ld.w      	r4, (r0, 0)
 554:	30a5      	movi      	r0, 165
 556:	4018      	lsli      	r0, r0, 24
 558:	6c40      	or      	r1, r0
		EPWM->SLPCMPAR0=(0xA5<<24)|Load_SLPCMPARX;
 55a:	6c80      	or      	r2, r0
		EPWM->SLPCMPBR0=(0xA5<<24)|Load_SLPCMPBRX;
 55c:	6c0c      	or      	r0, r3
		EPWM->SLPCNTR0=(0xA5<<24)|Load_SLPCNTRX;
 55e:	b426      	st.w      	r1, (r4, 0x18)
		EPWM->SLPCMPAR0=(0xA5<<24)|Load_SLPCMPARX;
 560:	b451      	st.w      	r2, (r4, 0x44)
		EPWM->SLPCMPBR0=(0xA5<<24)|Load_SLPCMPBRX;
 562:	b414      	st.w      	r0, (r4, 0x50)
	{
		EPWM->SLPCNTR1=(0xA5<<24)|Load_SLPCNTRX;
		EPWM->SLPCMPAR1=(0xA5<<24)|Load_SLPCMPARX;
		EPWM->SLPCMPBR1=(0xA5<<24)|Load_SLPCMPBRX;
	}
}
 564:	1482      	pop      	r4-r5
	else if(EPWM_SLPCNTRX_Selected==EPWM_SLPCNTR1)
 566:	3844      	cmpnei      	r0, 4
 568:	0bfe      	bt      	0x564	// 564 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x1a>
		EPWM->SLPCNTR1=(0xA5<<24)|Load_SLPCNTRX;
 56a:	34a5      	movi      	r4, 165
 56c:	4498      	lsli      	r4, r4, 24
 56e:	1005      	lrw      	r0, 0	// 580 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x36>
 570:	6c50      	or      	r1, r4
 572:	90a0      	ld.w      	r5, (r0, 0)
		EPWM->SLPCMPAR1=(0xA5<<24)|Load_SLPCMPARX;
 574:	6c90      	or      	r2, r4
		EPWM->SLPCMPBR1=(0xA5<<24)|Load_SLPCMPBRX;
 576:	6cd0      	or      	r3, r4
		EPWM->SLPCNTR1=(0xA5<<24)|Load_SLPCNTRX;
 578:	b52a      	st.w      	r1, (r5, 0x28)
		EPWM->SLPCMPAR1=(0xA5<<24)|Load_SLPCMPARX;
 57a:	b557      	st.w      	r2, (r5, 0x5c)
		EPWM->SLPCMPBR1=(0xA5<<24)|Load_SLPCMPBRX;
 57c:	b57a      	st.w      	r3, (r5, 0x68)
 57e:	0407      	br      	0x58c	// 58c <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x42>
 580:	00000000 	.long	0x00000000
 584:	000ffc00 	.long	0x000ffc00
 588:	000003ff 	.long	0x000003ff
}
 58c:	07ec      	br      	0x564	// 564 <EPWM_Set_SLPCNTRX_SLPCMPARX_SLPCMPBRX+0x1a>

0000058e <EPWM_software_reset>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_software_reset(void)
{
	EPWM->CR = EPWM->CR | S_RST;									// Reset PWM
 58e:	127e      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 590:	9340      	ld.w      	r2, (r3, 0)
 592:	9260      	ld.w      	r3, (r2, 0)
 594:	3ba2      	bseti      	r3, r3, 2
 596:	b260      	st.w      	r3, (r2, 0)
}
 598:	783c      	rts

0000059a <EPWM_AllConter_START>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_AllConter_START(void)
{
	EPWM->CR = EPWM->CR | PWMSTART;									// Start PWM
 59a:	127b      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 59c:	9340      	ld.w      	r2, (r3, 0)
 59e:	9260      	ld.w      	r3, (r2, 0)
 5a0:	3ba0      	bseti      	r3, r3, 0
 5a2:	b260      	st.w      	r3, (r2, 0)
}
 5a4:	783c      	rts

000005a6 <EPWM_Conter0_START>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter0_START(void)
{
	EPWM->CR = EPWM->CR | PWM0START;									// Start PWM0
 5a6:	1278      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 5a8:	9340      	ld.w      	r2, (r3, 0)
 5aa:	9260      	ld.w      	r3, (r2, 0)
 5ac:	3bb8      	bseti      	r3, r3, 24
 5ae:	b260      	st.w      	r3, (r2, 0)
}
 5b0:	783c      	rts

000005b2 <EPWM_Conter1_START>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter1_START(void)
{
	EPWM->CR = EPWM->CR | PWM1START;									// Start PWM1
 5b2:	1275      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 5b4:	9340      	ld.w      	r2, (r3, 0)
 5b6:	9260      	ld.w      	r3, (r2, 0)
 5b8:	3bb9      	bseti      	r3, r3, 25
 5ba:	b260      	st.w      	r3, (r2, 0)
}
 5bc:	783c      	rts

000005be <EPWM_Conter2_START>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter2_START(void)
{
	EPWM->CR = EPWM->CR | PWM2START;									// Start PWM2
 5be:	1272      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 5c0:	9340      	ld.w      	r2, (r3, 0)
 5c2:	9260      	ld.w      	r3, (r2, 0)
 5c4:	3bba      	bseti      	r3, r3, 26
 5c6:	b260      	st.w      	r3, (r2, 0)
}
 5c8:	783c      	rts

000005ca <EPWM_AllConter_stop>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_AllConter_stop(void)
{
	EPWM->CR = EPWM->CR | PWMSTOP;									// stop PWM
 5ca:	126f      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
	while( (EPWM->CR & BUSY) == BUSY );					// Check if the PWM is busy
 5cc:	3280      	movi      	r2, 128
	EPWM->CR = EPWM->CR | PWMSTOP;									// stop PWM
 5ce:	9320      	ld.w      	r1, (r3, 0)
 5d0:	9160      	ld.w      	r3, (r1, 0)
 5d2:	3ba1      	bseti      	r3, r3, 1
 5d4:	b160      	st.w      	r3, (r1, 0)
	while( (EPWM->CR & BUSY) == BUSY );					// Check if the PWM is busy
 5d6:	424d      	lsli      	r2, r2, 13
 5d8:	9160      	ld.w      	r3, (r1, 0)
 5da:	68c8      	and      	r3, r2
 5dc:	3b40      	cmpnei      	r3, 0
 5de:	0bfd      	bt      	0x5d8	// 5d8 <EPWM_AllConter_stop+0xe>
}
 5e0:	783c      	rts

000005e2 <EPWM_Conter0_STOP>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter0_STOP(void)
{
	EPWM->CR = EPWM->CR | PWM0STOP;									// Stop PWM0
 5e2:	1269      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
	while( (EPWM->RISR & EPWM_STOP0)!=EPWM_STOP0 );					// Check if the PWM0 stop complete
 5e4:	3102      	movi      	r1, 2
	EPWM->CR = EPWM->CR | PWM0STOP;									// Stop PWM0
 5e6:	9360      	ld.w      	r3, (r3, 0)
 5e8:	9340      	ld.w      	r2, (r3, 0)
 5ea:	3abb      	bseti      	r2, r2, 27
 5ec:	b340      	st.w      	r2, (r3, 0)
	while( (EPWM->RISR & EPWM_STOP0)!=EPWM_STOP0 );					// Check if the PWM0 stop complete
 5ee:	237f      	addi      	r3, 128
 5f0:	9350      	ld.w      	r2, (r3, 0x40)
 5f2:	6884      	and      	r2, r1
 5f4:	3a40      	cmpnei      	r2, 0
 5f6:	0ffd      	bf      	0x5f0	// 5f0 <EPWM_Conter0_STOP+0xe>
}
 5f8:	783c      	rts

000005fa <EPWM_Conter1_STOP>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter1_STOP(void)
{
	EPWM->CR = EPWM->CR | PWM1STOP;									// Stop PWM1
 5fa:	1263      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
	while( (EPWM->RISR & EPWM_STOP1)!=EPWM_STOP1 );					// Check if the PWM1 stop complete
 5fc:	3120      	movi      	r1, 32
	EPWM->CR = EPWM->CR | PWM1STOP;									// Stop PWM1
 5fe:	9360      	ld.w      	r3, (r3, 0)
 600:	9340      	ld.w      	r2, (r3, 0)
 602:	3abc      	bseti      	r2, r2, 28
 604:	b340      	st.w      	r2, (r3, 0)
	while( (EPWM->RISR & EPWM_STOP1)!=EPWM_STOP1 );					// Check if the PWM1 stop complete
 606:	237f      	addi      	r3, 128
 608:	9350      	ld.w      	r2, (r3, 0x40)
 60a:	6884      	and      	r2, r1
 60c:	3a40      	cmpnei      	r2, 0
 60e:	0ffd      	bf      	0x608	// 608 <EPWM_Conter1_STOP+0xe>
}
 610:	783c      	rts

00000612 <EPWM_Conter2_STOP>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/  
void EPWM_Conter2_STOP(void)
{
	EPWM->CR = EPWM->CR | PWM2STOP;									// Stop PWM2
 612:	117d      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
	while( (EPWM->RISR & EPWM_STOP2)!=EPWM_STOP2 );					// Check if the PWM2 stop complete
 614:	3180      	movi      	r1, 128
	EPWM->CR = EPWM->CR | PWM2STOP;									// Stop PWM2
 616:	9360      	ld.w      	r3, (r3, 0)
 618:	9340      	ld.w      	r2, (r3, 0)
 61a:	3abd      	bseti      	r2, r2, 29
 61c:	b340      	st.w      	r2, (r3, 0)
	while( (EPWM->RISR & EPWM_STOP2)!=EPWM_STOP2 );					// Check if the PWM2 stop complete
 61e:	4122      	lsli      	r1, r1, 2
 620:	237f      	addi      	r3, 128
 622:	9350      	ld.w      	r2, (r3, 0x40)
 624:	6884      	and      	r2, r1
 626:	3a40      	cmpnei      	r2, 0
 628:	0ffd      	bf      	0x622	// 622 <EPWM_Conter2_STOP+0x10>
}
 62a:	783c      	rts

0000062c <EPWM_ConfigInterrupt_CMD>:
//EPWM0_SLPA_OVF,EPWM0_SLPB_OVF,EPWM1_SLPA_OVF,EPWM1_SLPB_OVF
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/ 
void EPWM_ConfigInterrupt_CMD(EPWM_INT_TypeDef EPWM_INT_X , FunctionalStatus NewState)
{
 62c:	1176      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
	if (NewState != DISABLE)
 62e:	3940      	cmpnei      	r1, 0
	{
		EPWM->IER  |= EPWM_INT_X;						//SET
 630:	9360      	ld.w      	r3, (r3, 0)
 632:	237f      	addi      	r3, 128
 634:	934e      	ld.w      	r2, (r3, 0x38)
	if (NewState != DISABLE)
 636:	0c04      	bf      	0x63e	// 63e <EPWM_ConfigInterrupt_CMD+0x12>
		EPWM->IER  |= EPWM_INT_X;						//SET
 638:	6c08      	or      	r0, r2
	}
	else
	{
		EPWM->IER  &= ~EPWM_INT_X;						//CLR
 63a:	b30e      	st.w      	r0, (r3, 0x38)
	}
}
 63c:	783c      	rts
		EPWM->IER  &= ~EPWM_INT_X;						//CLR
 63e:	6c02      	nor      	r0, r0
 640:	6808      	and      	r0, r2
 642:	07fc      	br      	0x63a	// 63a <EPWM_ConfigInterrupt_CMD+0xe>

00000644 <EPWM_Carrier_Wave_CMD>:
//ReturnValue:NONE
/*************************************************************/ 
//CarrierWave_Duty_time=OSW_time*(PCLK/CDIV)*8
void EPWM_Carrier_Wave_CMD(EPWM_PWM_XxOrPWM_Yx_TypeDef EPWM_PWM_XxOrPWM_Yx , EPWM_Carrier_Wave_Duty_TypeDef EPWM_Carrier_Wave_Duty_X ,
					EPWM_CDIV_TypeDef EPWM_CDIV_X , U8_T OSW_time , FunctionalStatus NewState)
{
 644:	14c2      	push      	r4-r5
	if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X0OrPWM_Y0)
 646:	3840      	cmpnei      	r0, 0
{
 648:	9882      	ld.w      	r4, (sp, 0x8)
	if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X0OrPWM_Y0)
 64a:	0810      	bt      	0x66a	// 66a <EPWM_Carrier_Wave_CMD+0x26>
	{
		EPWM->CFCR0=EPWM_Carrier_Wave_Duty_X|EPWM_CDIV_X|(OSW_time<<4);
 64c:	110e      	lrw      	r0, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 64e:	4364      	lsli      	r3, r3, 4
 650:	9000      	ld.w      	r0, (r0, 0)
 652:	6c84      	or      	r2, r1
 654:	6c8c      	or      	r2, r3
 656:	207f      	addi      	r0, 128
 658:	b047      	st.w      	r2, (r0, 0x1c)
		if (NewState != DISABLE)
 65a:	3c40      	cmpnei      	r4, 0
		{
			EPWM->CFCR0  |= 0x01;						//SET
 65c:	9067      	ld.w      	r3, (r0, 0x1c)
		if (NewState != DISABLE)
 65e:	0c04      	bf      	0x666	// 666 <EPWM_Carrier_Wave_CMD+0x22>
			EPWM->CFCR0  |= 0x01;						//SET
 660:	3ba0      	bseti      	r3, r3, 0
		}
		else
		{
			EPWM->CFCR0  &= 0xfffffffe;					//CLR
 662:	b067      	st.w      	r3, (r0, 0x1c)
		else
		{
			EPWM->CFCR2  &= 0xfffffffe;					//CLR
		}
	}
}
 664:	1482      	pop      	r4-r5
			EPWM->CFCR0  &= 0xfffffffe;					//CLR
 666:	3b80      	bclri      	r3, r3, 0
 668:	07fd      	br      	0x662	// 662 <EPWM_Carrier_Wave_CMD+0x1e>
	else if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X1OrPWM_Y1)
 66a:	3841      	cmpnei      	r0, 1
 66c:	0811      	bt      	0x68e	// 68e <EPWM_Carrier_Wave_CMD+0x4a>
		EPWM->CFCR1=EPWM_Carrier_Wave_Duty_X|EPWM_CDIV_X|(OSW_time<<4);
 66e:	11a6      	lrw      	r5, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 670:	4364      	lsli      	r3, r3, 4
 672:	95a0      	ld.w      	r5, (r5, 0)
 674:	6c84      	or      	r2, r1
 676:	6c8c      	or      	r2, r3
 678:	257f      	addi      	r5, 128
 67a:	b548      	st.w      	r2, (r5, 0x20)
		if (NewState != DISABLE)
 67c:	3c40      	cmpnei      	r4, 0
			EPWM->CFCR1  |= 0x01;						//SET
 67e:	9568      	ld.w      	r3, (r5, 0x20)
		if (NewState != DISABLE)
 680:	0c04      	bf      	0x688	// 688 <EPWM_Carrier_Wave_CMD+0x44>
			EPWM->CFCR1  |= 0x01;						//SET
 682:	6c0c      	or      	r0, r3
 684:	b508      	st.w      	r0, (r5, 0x20)
 686:	07ef      	br      	0x664	// 664 <EPWM_Carrier_Wave_CMD+0x20>
			EPWM->CFCR1  &= 0xfffffffe;					//CLR
 688:	3b80      	bclri      	r3, r3, 0
 68a:	b568      	st.w      	r3, (r5, 0x20)
 68c:	07ec      	br      	0x664	// 664 <EPWM_Carrier_Wave_CMD+0x20>
	else if(EPWM_PWM_XxOrPWM_Yx==EPWM_PWM_X2OrPWM_Y2)
 68e:	3842      	cmpnei      	r0, 2
 690:	0bea      	bt      	0x664	// 664 <EPWM_Carrier_Wave_CMD+0x20>
		EPWM->CFCR2|=EPWM_Carrier_Wave_Duty_X|EPWM_CDIV_X|(OSW_time<<4);
 692:	101d      	lrw      	r0, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 694:	4364      	lsli      	r3, r3, 4
 696:	9000      	ld.w      	r0, (r0, 0)
 698:	207f      	addi      	r0, 128
 69a:	90a9      	ld.w      	r5, (r0, 0x24)
 69c:	6c94      	or      	r2, r5
 69e:	6c84      	or      	r2, r1
 6a0:	6c8c      	or      	r2, r3
 6a2:	b049      	st.w      	r2, (r0, 0x24)
		if (NewState != DISABLE)
 6a4:	3c40      	cmpnei      	r4, 0
			EPWM->CFCR2  |= 0x01;						//SET
 6a6:	9069      	ld.w      	r3, (r0, 0x24)
		if (NewState != DISABLE)
 6a8:	0c04      	bf      	0x6b0	// 6b0 <EPWM_Carrier_Wave_CMD+0x6c>
			EPWM->CFCR2  |= 0x01;						//SET
 6aa:	3ba0      	bseti      	r3, r3, 0
			EPWM->CFCR2  &= 0xfffffffe;					//CLR
 6ac:	b069      	st.w      	r3, (r0, 0x24)
}
 6ae:	07db      	br      	0x664	// 664 <EPWM_Carrier_Wave_CMD+0x20>
			EPWM->CFCR2  &= 0xfffffffe;					//CLR
 6b0:	3b80      	bclri      	r3, r3, 0
 6b2:	07fd      	br      	0x6ac	// 6ac <EPWM_Carrier_Wave_CMD+0x68>

000006b4 <EPWM_LKCR_TRG_Configure>:
//10：选择为软锁止的触发源
//11：选择为硬锁止的触发源
//IVT = TRGIVT x 4 x Tpwmclk  ; TDL = (TRGTDL+1) x 4 x Tpwmclk 
void EPWM_LKCR_TRG_Configure(EPWM_Triggle_Source_TypeDef EPWM_Triggle_Source_X , U8_T EPWM_LK_mode_selected)
{
	if(EPWM_Triggle_Source_X==CMP0LKM)
 6b4:	3841      	cmpnei      	r0, 1
 6b6:	080b      	bt      	0x6cc	// 6cc <EPWM_LKCR_TRG_Configure+0x18>
	{
		EPWM->LKCR&=0XFFFFFFF8;
 6b8:	1073      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 6ba:	3007      	movi      	r0, 7
 6bc:	9360      	ld.w      	r3, (r3, 0)
 6be:	9341      	ld.w      	r2, (r3, 0x4)
 6c0:	6881      	andn      	r2, r0
 6c2:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected;
 6c4:	9341      	ld.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<18;
	}
	else if(EPWM_Triggle_Source_X==EXI3LKM)
	{
		EPWM->LKCR&=0XFF1FFFFF;
		EPWM->LKCR|=EPWM_LK_mode_selected<<21;
 6c6:	6c48      	or      	r1, r2
 6c8:	b321      	st.w      	r1, (r3, 0x4)
	else if(EPWM_Triggle_Source_X==EXI7LKM)
	{
		EPWM->LKCR&=0X3FFFFFFF;
		EPWM->LKCR|=EPWM_LK_mode_selected<<30;
	}*/
}
 6ca:	783c      	rts
	else if(EPWM_Triggle_Source_X==CMP1LKM)
 6cc:	3842      	cmpnei      	r0, 2
 6ce:	080a      	bt      	0x6e2	// 6e2 <EPWM_LKCR_TRG_Configure+0x2e>
		EPWM->LKCR&=0XFFFFFFC7;
 6d0:	106d      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
 6d2:	3038      	movi      	r0, 56
 6d4:	9360      	ld.w      	r3, (r3, 0)
 6d6:	9341      	ld.w      	r2, (r3, 0x4)
 6d8:	6881      	andn      	r2, r0
 6da:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<3;
 6dc:	9341      	ld.w      	r2, (r3, 0x4)
 6de:	4123      	lsli      	r1, r1, 3
 6e0:	07f3      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==CMP2LKM)
 6e2:	3843      	cmpnei      	r0, 3
 6e4:	080a      	bt      	0x6f8	// 6f8 <EPWM_LKCR_TRG_Configure+0x44>
		EPWM->LKCR&=0XFFFFFF3F;
 6e6:	1068      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
		EPWM->LKCR|=EPWM_LK_mode_selected<<6;
 6e8:	4126      	lsli      	r1, r1, 6
		EPWM->LKCR&=0XFFFFFF3F;
 6ea:	9360      	ld.w      	r3, (r3, 0)
 6ec:	9341      	ld.w      	r2, (r3, 0x4)
 6ee:	3a86      	bclri      	r2, r2, 6
 6f0:	3a87      	bclri      	r2, r2, 7
 6f2:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<6;
 6f4:	9341      	ld.w      	r2, (r3, 0x4)
 6f6:	07e8      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==CMP3LKM)
 6f8:	3844      	cmpnei      	r0, 4
 6fa:	080e      	bt      	0x716	// 716 <EPWM_LKCR_TRG_Configure+0x62>
		EPWM->LKCR&=0XFFFFFCFF;
 6fc:	1062      	lrw      	r3, 0	// 704 <EPWM_LKCR_TRG_Configure+0x50>
		EPWM->LKCR|=EPWM_LK_mode_selected<<8;
 6fe:	4128      	lsli      	r1, r1, 8
 700:	0404      	br      	0x708	// 708 <EPWM_LKCR_TRG_Configure+0x54>
 702:	0000      	bkpt
 704:	00000000 	.long	0x00000000
		EPWM->LKCR&=0XFFFFFCFF;
 708:	9360      	ld.w      	r3, (r3, 0)
 70a:	9341      	ld.w      	r2, (r3, 0x4)
 70c:	3a88      	bclri      	r2, r2, 8
 70e:	3a89      	bclri      	r2, r2, 9
 710:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<8;
 712:	9341      	ld.w      	r2, (r3, 0x4)
 714:	07d9      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==CMP4LKM)
 716:	3845      	cmpnei      	r0, 5
 718:	080a      	bt      	0x72c	// 72c <EPWM_LKCR_TRG_Configure+0x78>
		EPWM->LKCR&=0XFFFFF3FF;
 71a:	1366      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->LKCR|=EPWM_LK_mode_selected<<10;
 71c:	412a      	lsli      	r1, r1, 10
		EPWM->LKCR&=0XFFFFF3FF;
 71e:	9360      	ld.w      	r3, (r3, 0)
 720:	9341      	ld.w      	r2, (r3, 0x4)
 722:	3a8a      	bclri      	r2, r2, 10
 724:	3a8b      	bclri      	r2, r2, 11
 726:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<10;
 728:	9341      	ld.w      	r2, (r3, 0x4)
 72a:	07ce      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==EXI0LKM)
 72c:	3846      	cmpnei      	r0, 6
 72e:	080b      	bt      	0x744	// 744 <EPWM_LKCR_TRG_Configure+0x90>
		EPWM->LKCR&=0XFFFF8FFF;
 730:	1360      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 732:	30e0      	movi      	r0, 224
 734:	9360      	ld.w      	r3, (r3, 0)
 736:	9341      	ld.w      	r2, (r3, 0x4)
 738:	4007      	lsli      	r0, r0, 7
 73a:	6881      	andn      	r2, r0
 73c:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<12;
 73e:	9341      	ld.w      	r2, (r3, 0x4)
 740:	412c      	lsli      	r1, r1, 12
 742:	07c2      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==EXI1LKM)
 744:	3847      	cmpnei      	r0, 7
 746:	080b      	bt      	0x75c	// 75c <EPWM_LKCR_TRG_Configure+0xa8>
		EPWM->LKCR&=0XFFFC7FFF;
 748:	127a      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 74a:	30e0      	movi      	r0, 224
 74c:	9360      	ld.w      	r3, (r3, 0)
 74e:	9341      	ld.w      	r2, (r3, 0x4)
 750:	400a      	lsli      	r0, r0, 10
 752:	6881      	andn      	r2, r0
 754:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<15;
 756:	9341      	ld.w      	r2, (r3, 0x4)
 758:	412f      	lsli      	r1, r1, 15
 75a:	07b6      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==EXI2LKM)
 75c:	3848      	cmpnei      	r0, 8
 75e:	080b      	bt      	0x774	// 774 <EPWM_LKCR_TRG_Configure+0xc0>
		EPWM->LKCR&=0XFFE3FFFF;
 760:	1274      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 762:	30e0      	movi      	r0, 224
 764:	9360      	ld.w      	r3, (r3, 0)
 766:	9341      	ld.w      	r2, (r3, 0x4)
 768:	400d      	lsli      	r0, r0, 13
 76a:	6881      	andn      	r2, r0
 76c:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<18;
 76e:	9341      	ld.w      	r2, (r3, 0x4)
 770:	4132      	lsli      	r1, r1, 18
 772:	07aa      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>
	else if(EPWM_Triggle_Source_X==EXI3LKM)
 774:	3849      	cmpnei      	r0, 9
 776:	0baa      	bt      	0x6ca	// 6ca <EPWM_LKCR_TRG_Configure+0x16>
		EPWM->LKCR&=0XFF1FFFFF;
 778:	126e      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 77a:	30e0      	movi      	r0, 224
 77c:	9360      	ld.w      	r3, (r3, 0)
 77e:	9341      	ld.w      	r2, (r3, 0x4)
 780:	4010      	lsli      	r0, r0, 16
 782:	6881      	andn      	r2, r0
 784:	b341      	st.w      	r2, (r3, 0x4)
		EPWM->LKCR|=EPWM_LK_mode_selected<<21;
 786:	9341      	ld.w      	r2, (r3, 0x4)
 788:	4135      	lsli      	r1, r1, 21
 78a:	079e      	br      	0x6c6	// 6c6 <EPWM_LKCR_TRG_Configure+0x12>

0000078c <EPWM_TrgivtAndTrgtdl_Set_Configure>:
//EPWM_TRGIVT:0~255
//ReturnValue:NONE
/*************************************************************/
void EPWM_TrgivtAndTrgtdl_Set_Configure(U8_T EPWM_TRGTDL , U8_T EPWM_TRGIVT)
{
	EPWM->LKTRG = (0XA5<<24) | (EPWM_TRGTDL<<8) | EPWM_TRGIVT;
 78c:	1269      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 78e:	4008      	lsli      	r0, r0, 8
 790:	9340      	ld.w      	r2, (r3, 0)
 792:	33a5      	movi      	r3, 165
 794:	4378      	lsli      	r3, r3, 24
 796:	6c4c      	or      	r1, r3
 798:	6c04      	or      	r0, r1
 79a:	b202      	st.w      	r0, (r2, 0x8)
}
 79c:	783c      	rts

0000079e <EPWM_Software_Clr>:
//EPWM Software clr
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Software_Clr(void)
{
 79e:	14c1      	push      	r4
	R_EPWM_EMR_ST=EPWM->EMR&0XFFFFFFFC;
 7a0:	1264      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
	if(EPWM->EMR&0x02)
 7a2:	3402      	movi      	r4, 2
	R_EPWM_EMR_ST=EPWM->EMR&0XFFFFFFFC;
 7a4:	9340      	ld.w      	r2, (r3, 0)
 7a6:	227f      	addi      	r2, 128
 7a8:	922a      	ld.w      	r1, (r2, 0x28)
 7aa:	3980      	bclri      	r1, r1, 0
 7ac:	3981      	bclri      	r1, r1, 1
 7ae:	1262      	lrw      	r3, 0	// 8b4 <EPWM_SoftHardWare_OUTPUT_Configure+0xc0>
 7b0:	b320      	st.w      	r1, (r3, 0)
	if(EPWM->EMR&0x02)
 7b2:	920a      	ld.w      	r0, (r2, 0x28)
 7b4:	6810      	and      	r0, r4
 7b6:	3840      	cmpnei      	r0, 0
 7b8:	0c04      	bf      	0x7c0	// 7c0 <EPWM_Software_Clr+0x22>
	{
		R_EPWM_EMR_ST|=0x02;
 7ba:	9320      	ld.w      	r1, (r3, 0)
 7bc:	6c50      	or      	r1, r4
 7be:	b320      	st.w      	r1, (r3, 0)
	}
	EPWM->EMR=R_EPWM_EMR_ST;
 7c0:	9360      	ld.w      	r3, (r3, 0)
 7c2:	b26a      	st.w      	r3, (r2, 0x28)
}
 7c4:	1481      	pop      	r4

000007c6 <EPWM_Hardware_Clr>:
//EPWM Hardware clr
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Hardware_Clr(void)
{
 7c6:	14c1      	push      	r4
	R_EPWM_EMR_ST=EPWM->EMR&0XFFFFFFFC;
 7c8:	117a      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
 7ca:	115b      	lrw      	r2, 0	// 8b4 <EPWM_SoftHardWare_OUTPUT_Configure+0xc0>
	if(EPWM->EMR&0x01)
 7cc:	3401      	movi      	r4, 1
	R_EPWM_EMR_ST=EPWM->EMR&0XFFFFFFFC;
 7ce:	9360      	ld.w      	r3, (r3, 0)
 7d0:	237f      	addi      	r3, 128
 7d2:	932a      	ld.w      	r1, (r3, 0x28)
 7d4:	3980      	bclri      	r1, r1, 0
 7d6:	3981      	bclri      	r1, r1, 1
 7d8:	b220      	st.w      	r1, (r2, 0)
	if(EPWM->EMR&0x01)
 7da:	930a      	ld.w      	r0, (r3, 0x28)
 7dc:	6810      	and      	r0, r4
 7de:	3840      	cmpnei      	r0, 0
 7e0:	0c04      	bf      	0x7e8	// 7e8 <EPWM_Hardware_Clr+0x22>
	{
		R_EPWM_EMR_ST|=0x01;
 7e2:	9220      	ld.w      	r1, (r2, 0)
 7e4:	6c50      	or      	r1, r4
 7e6:	b220      	st.w      	r1, (r2, 0)
	}
	EPWM->EMR=R_EPWM_EMR_ST;
 7e8:	9240      	ld.w      	r2, (r2, 0)
 7ea:	b34a      	st.w      	r2, (r3, 0x28)
	
	EPWM->EMR|=0x01;
 7ec:	934a      	ld.w      	r2, (r3, 0x28)
 7ee:	3aa0      	bseti      	r2, r2, 0
 7f0:	b34a      	st.w      	r2, (r3, 0x28)
}
 7f2:	1481      	pop      	r4

000007f4 <EPWM_SoftHardWare_OUTPUT_Configure>:
//EPWM_LK_output_X:EPWM_LK_output_LOW,EPWM_LK_output_High,EPWM_LK_output_OP,EPWM_LK_output_keep
//ReturnValue:NONE
/*************************************************************/
void EPWM_SoftHardWare_OUTPUT_Configure(EPWM_LK_output_Select_TypeDef EPWM_LK_output_Select_X , EPWM_LK_output_TypeDef EPWM_LK_output_X)
{
	if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP0XS)
 7f4:	3841      	cmpnei      	r0, 1
 7f6:	080d      	bt      	0x810	// 810 <EPWM_SoftHardWare_OUTPUT_Configure+0x1c>
	{
		EPWM->EMR&=0XFFFFFFF3;
 7f8:	116e      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<2;
 7fa:	4122      	lsli      	r1, r1, 2
		EPWM->EMR&=0XFFFFFFF3;
 7fc:	9360      	ld.w      	r3, (r3, 0)
 7fe:	237f      	addi      	r3, 128
 800:	934a      	ld.w      	r2, (r3, 0x28)
 802:	3a82      	bclri      	r2, r2, 2
 804:	3a83      	bclri      	r2, r2, 3
 806:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<2;
 808:	934a      	ld.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<22;
	}
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP2YS)
	{
		EPWM->EMR&=0XFCFFFFFF;
		EPWM->EMR|=EPWM_LK_output_X<<24;
 80a:	6c48      	or      	r1, r2
 80c:	b32a      	st.w      	r1, (r3, 0x28)
	}
}
 80e:	783c      	rts
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP0YS)
 810:	3842      	cmpnei      	r0, 2
 812:	080b      	bt      	0x828	// 828 <EPWM_SoftHardWare_OUTPUT_Configure+0x34>
		EPWM->EMR&=0XFFFFFFCF;
 814:	1167      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<4;
 816:	4124      	lsli      	r1, r1, 4
		EPWM->EMR&=0XFFFFFFCF;
 818:	9360      	ld.w      	r3, (r3, 0)
 81a:	237f      	addi      	r3, 128
 81c:	934a      	ld.w      	r2, (r3, 0x28)
 81e:	3a84      	bclri      	r2, r2, 4
 820:	3a85      	bclri      	r2, r2, 5
 822:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<4;
 824:	934a      	ld.w      	r2, (r3, 0x28)
 826:	07f2      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP0XS)
 828:	3843      	cmpnei      	r0, 3
 82a:	080b      	bt      	0x840	// 840 <EPWM_SoftHardWare_OUTPUT_Configure+0x4c>
		EPWM->EMR&=0XFFFFFF3F;
 82c:	1161      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<6;
 82e:	4126      	lsli      	r1, r1, 6
		EPWM->EMR&=0XFFFFFF3F;
 830:	9360      	ld.w      	r3, (r3, 0)
 832:	237f      	addi      	r3, 128
 834:	934a      	ld.w      	r2, (r3, 0x28)
 836:	3a86      	bclri      	r2, r2, 6
 838:	3a87      	bclri      	r2, r2, 7
 83a:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<6;
 83c:	934a      	ld.w      	r2, (r3, 0x28)
 83e:	07e6      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP0YS)
 840:	3844      	cmpnei      	r0, 4
 842:	080b      	bt      	0x858	// 858 <EPWM_SoftHardWare_OUTPUT_Configure+0x64>
		EPWM->EMR&=0XFFFFFCFF;
 844:	107b      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<8;
 846:	4128      	lsli      	r1, r1, 8
		EPWM->EMR&=0XFFFFFCFF;
 848:	9360      	ld.w      	r3, (r3, 0)
 84a:	237f      	addi      	r3, 128
 84c:	934a      	ld.w      	r2, (r3, 0x28)
 84e:	3a88      	bclri      	r2, r2, 8
 850:	3a89      	bclri      	r2, r2, 9
 852:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<8;
 854:	934a      	ld.w      	r2, (r3, 0x28)
 856:	07da      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP1XS)
 858:	3845      	cmpnei      	r0, 5
 85a:	080b      	bt      	0x870	// 870 <EPWM_SoftHardWare_OUTPUT_Configure+0x7c>
		EPWM->EMR&=0XFFFFF3FF;
 85c:	1075      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<10;
 85e:	412a      	lsli      	r1, r1, 10
		EPWM->EMR&=0XFFFFF3FF;
 860:	9360      	ld.w      	r3, (r3, 0)
 862:	237f      	addi      	r3, 128
 864:	934a      	ld.w      	r2, (r3, 0x28)
 866:	3a8a      	bclri      	r2, r2, 10
 868:	3a8b      	bclri      	r2, r2, 11
 86a:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<10;
 86c:	934a      	ld.w      	r2, (r3, 0x28)
 86e:	07ce      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP1YS)
 870:	3846      	cmpnei      	r0, 6
 872:	080b      	bt      	0x888	// 888 <EPWM_SoftHardWare_OUTPUT_Configure+0x94>
		EPWM->EMR&=0XFFFFCFFF;
 874:	106f      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<12;
 876:	412c      	lsli      	r1, r1, 12
		EPWM->EMR&=0XFFFFCFFF;
 878:	9360      	ld.w      	r3, (r3, 0)
 87a:	237f      	addi      	r3, 128
 87c:	934a      	ld.w      	r2, (r3, 0x28)
 87e:	3a8c      	bclri      	r2, r2, 12
 880:	3a8d      	bclri      	r2, r2, 13
 882:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<12;
 884:	934a      	ld.w      	r2, (r3, 0x28)
 886:	07c2      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP1XS)
 888:	3847      	cmpnei      	r0, 7
 88a:	080b      	bt      	0x8a0	// 8a0 <EPWM_SoftHardWare_OUTPUT_Configure+0xac>
		EPWM->EMR&=0XFFFF3FFF;
 88c:	1069      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<14;
 88e:	412e      	lsli      	r1, r1, 14
		EPWM->EMR&=0XFFFF3FFF;
 890:	9360      	ld.w      	r3, (r3, 0)
 892:	237f      	addi      	r3, 128
 894:	934a      	ld.w      	r2, (r3, 0x28)
 896:	3a8e      	bclri      	r2, r2, 14
 898:	3a8f      	bclri      	r2, r2, 15
 89a:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<14;
 89c:	934a      	ld.w      	r2, (r3, 0x28)
 89e:	07b6      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP1YS)
 8a0:	3848      	cmpnei      	r0, 8
 8a2:	0811      	bt      	0x8c4	// 8c4 <EPWM_SoftHardWare_OUTPUT_Configure+0xd0>
		EPWM->EMR&=0XFFFCFFFF;
 8a4:	1063      	lrw      	r3, 0	// 8b0 <EPWM_SoftHardWare_OUTPUT_Configure+0xbc>
		EPWM->EMR|=EPWM_LK_output_X<<16;
 8a6:	4130      	lsli      	r1, r1, 16
		EPWM->EMR&=0XFFFCFFFF;
 8a8:	9360      	ld.w      	r3, (r3, 0)
 8aa:	237f      	addi      	r3, 128
 8ac:	0406      	br      	0x8b8	// 8b8 <EPWM_SoftHardWare_OUTPUT_Configure+0xc4>
	...
 8b6:	0000      	.short	0x0000
 8b8:	934a      	ld.w      	r2, (r3, 0x28)
 8ba:	3a90      	bclri      	r2, r2, 16
 8bc:	3a91      	bclri      	r2, r2, 17
 8be:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<16;
 8c0:	934a      	ld.w      	r2, (r3, 0x28)
 8c2:	07a4      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP2XS)
 8c4:	3849      	cmpnei      	r0, 9
 8c6:	080b      	bt      	0x8dc	// 8dc <EPWM_SoftHardWare_OUTPUT_Configure+0xe8>
		EPWM->EMR&=0XFFF3FFFF;
 8c8:	127b      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		EPWM->EMR|=EPWM_LK_output_X<<18;
 8ca:	4132      	lsli      	r1, r1, 18
		EPWM->EMR&=0XFFF3FFFF;
 8cc:	9360      	ld.w      	r3, (r3, 0)
 8ce:	237f      	addi      	r3, 128
 8d0:	934a      	ld.w      	r2, (r3, 0x28)
 8d2:	3a92      	bclri      	r2, r2, 18
 8d4:	3a93      	bclri      	r2, r2, 19
 8d6:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<18;
 8d8:	934a      	ld.w      	r2, (r3, 0x28)
 8da:	0798      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_HLP2YS)
 8dc:	384a      	cmpnei      	r0, 10
 8de:	080b      	bt      	0x8f4	// 8f4 <EPWM_SoftHardWare_OUTPUT_Configure+0x100>
		EPWM->EMR&=0XFFCFFFFF;
 8e0:	1275      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		EPWM->EMR|=EPWM_LK_output_X<<20;
 8e2:	4134      	lsli      	r1, r1, 20
		EPWM->EMR&=0XFFCFFFFF;
 8e4:	9360      	ld.w      	r3, (r3, 0)
 8e6:	237f      	addi      	r3, 128
 8e8:	934a      	ld.w      	r2, (r3, 0x28)
 8ea:	3a94      	bclri      	r2, r2, 20
 8ec:	3a95      	bclri      	r2, r2, 21
 8ee:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<20;
 8f0:	934a      	ld.w      	r2, (r3, 0x28)
 8f2:	078c      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP2XS)
 8f4:	384b      	cmpnei      	r0, 11
 8f6:	080b      	bt      	0x90c	// 90c <EPWM_SoftHardWare_OUTPUT_Configure+0x118>
		EPWM->EMR&=0XFF3FFFFF;
 8f8:	126f      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		EPWM->EMR|=EPWM_LK_output_X<<22;
 8fa:	4136      	lsli      	r1, r1, 22
		EPWM->EMR&=0XFF3FFFFF;
 8fc:	9360      	ld.w      	r3, (r3, 0)
 8fe:	237f      	addi      	r3, 128
 900:	934a      	ld.w      	r2, (r3, 0x28)
 902:	3a96      	bclri      	r2, r2, 22
 904:	3a97      	bclri      	r2, r2, 23
 906:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<22;
 908:	934a      	ld.w      	r2, (r3, 0x28)
 90a:	0780      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>
	else if(EPWM_LK_output_Select_X==EPWM_LK_output_SLP2YS)
 90c:	384c      	cmpnei      	r0, 12
 90e:	0b80      	bt      	0x80e	// 80e <EPWM_SoftHardWare_OUTPUT_Configure+0x1a>
		EPWM->EMR&=0XFCFFFFFF;
 910:	1269      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		EPWM->EMR|=EPWM_LK_output_X<<24;
 912:	4138      	lsli      	r1, r1, 24
		EPWM->EMR&=0XFCFFFFFF;
 914:	9360      	ld.w      	r3, (r3, 0)
 916:	237f      	addi      	r3, 128
 918:	934a      	ld.w      	r2, (r3, 0x28)
 91a:	3a98      	bclri      	r2, r2, 24
 91c:	3a99      	bclri      	r2, r2, 25
 91e:	b34a      	st.w      	r2, (r3, 0x28)
		EPWM->EMR|=EPWM_LK_output_X<<24;
 920:	934a      	ld.w      	r2, (r3, 0x28)
 922:	0774      	br      	0x80a	// 80a <EPWM_SoftHardWare_OUTPUT_Configure+0x16>

00000924 <EPMW_Soft_Lock_Auto_adjust_Configure>:
//ReturnValue:NONE
/*************************************************************/
//每组CMPAX和CMPBX不能同时设置为增或者减
void EPMW_Soft_Lock_Auto_adjust_Configure(EPWM_SLCON_TypeDef EPWM_SLCON__X , FunctionalStatus NewState , U16_T INC_DEC_STEPX)
{
	if(EPWM_SLCON__X==EPWM_SL_DECA_EN0)
 924:	3841      	cmpnei      	r0, 1
 926:	0811      	bt      	0x948	// 948 <EPMW_Soft_Lock_Auto_adjust_Configure+0x24>
 928:	1263      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
	{
		if (NewState != DISABLE)
 92a:	3940      	cmpnei      	r1, 0
		{
			EPWM->SLCON|=0X00000001;
 92c:	9360      	ld.w      	r3, (r3, 0)
 92e:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 930:	0c08      	bf      	0x940	// 940 <EPMW_Soft_Lock_Auto_adjust_Configure+0x1c>
			EPWM->SLCON|=0X00000001;
 932:	932b      	ld.w      	r1, (r3, 0x2c)
 934:	6c04      	or      	r0, r1
 936:	b30b      	st.w      	r0, (r3, 0x2c)
	else if(EPWM_SLCON__X==EPWM_SL_DECB_EN0)
	{
		if (NewState != DISABLE)
		{
			EPWM->SLCON|=0X00000004;
			EPWM->SLSTEP0=(EPWM->SLSTEP0&0XFFFFF000)|INC_DEC_STEPX;
 938:	932c      	ld.w      	r1, (r3, 0x30)
 93a:	1200      	lrw      	r0, 0xfff	// a38 <EPMW_Soft_Lock_Auto_adjust_Configure+0x114>
 93c:	6841      	andn      	r1, r0
 93e:	0413      	br      	0x964	// 964 <EPMW_Soft_Lock_Auto_adjust_Configure+0x40>
			EPWM->SLCON&=0XFFFFFFFE;
 940:	934b      	ld.w      	r2, (r3, 0x2c)
 942:	3a80      	bclri      	r2, r2, 0
		{
			EPWM->SLCON|=0X00000200;
		}
		else
		{
			EPWM->SLCON&=0XFFFFFDFF;
 944:	b34b      	st.w      	r2, (r3, 0x2c)
		}
	}
}
 946:	0411      	br      	0x968	// 968 <EPMW_Soft_Lock_Auto_adjust_Configure+0x44>
	else if(EPWM_SLCON__X==EPWM_SL_INCA_EN0)
 948:	3842      	cmpnei      	r0, 2
 94a:	0813      	bt      	0x970	// 970 <EPMW_Soft_Lock_Auto_adjust_Configure+0x4c>
 94c:	117a      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 94e:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000002;
 950:	9360      	ld.w      	r3, (r3, 0)
 952:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 954:	0c0b      	bf      	0x96a	// 96a <EPMW_Soft_Lock_Auto_adjust_Configure+0x46>
			EPWM->SLCON|=0X00000002;
 956:	932b      	ld.w      	r1, (r3, 0x2c)
 958:	6c04      	or      	r0, r1
 95a:	b30b      	st.w      	r0, (r3, 0x2c)
			EPWM->SLSTEP0=(EPWM->SLSTEP0&0XFF000FFF)|(INC_DEC_STEPX<<12);
 95c:	932c      	ld.w      	r1, (r3, 0x30)
 95e:	1118      	lrw      	r0, 0xfff000	// a3c <EPMW_Soft_Lock_Auto_adjust_Configure+0x118>
 960:	6841      	andn      	r1, r0
 962:	424c      	lsli      	r2, r2, 12
 964:	6c84      	or      	r2, r1
 966:	b34c      	st.w      	r2, (r3, 0x30)
}
 968:	783c      	rts
			EPWM->SLCON&=0XFFFFFFFD;
 96a:	934b      	ld.w      	r2, (r3, 0x2c)
 96c:	3a81      	bclri      	r2, r2, 1
 96e:	07eb      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_DECB_EN0)
 970:	3843      	cmpnei      	r0, 3
 972:	080d      	bt      	0x98c	// 98c <EPMW_Soft_Lock_Auto_adjust_Configure+0x68>
 974:	1170      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 976:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000004;
 978:	9360      	ld.w      	r3, (r3, 0)
 97a:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 97c:	0c05      	bf      	0x986	// 986 <EPMW_Soft_Lock_Auto_adjust_Configure+0x62>
			EPWM->SLCON|=0X00000004;
 97e:	932b      	ld.w      	r1, (r3, 0x2c)
 980:	39a2      	bseti      	r1, r1, 2
 982:	b32b      	st.w      	r1, (r3, 0x2c)
 984:	07da      	br      	0x938	// 938 <EPMW_Soft_Lock_Auto_adjust_Configure+0x14>
			EPWM->SLCON&=0XFFFFFFFB;
 986:	934b      	ld.w      	r2, (r3, 0x2c)
 988:	3a82      	bclri      	r2, r2, 2
 98a:	07dd      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_INCB_EN0)
 98c:	3844      	cmpnei      	r0, 4
 98e:	080d      	bt      	0x9a8	// 9a8 <EPMW_Soft_Lock_Auto_adjust_Configure+0x84>
 990:	1169      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 992:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000008;
 994:	9360      	ld.w      	r3, (r3, 0)
 996:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 998:	0c05      	bf      	0x9a2	// 9a2 <EPMW_Soft_Lock_Auto_adjust_Configure+0x7e>
			EPWM->SLCON|=0X00000008;
 99a:	932b      	ld.w      	r1, (r3, 0x2c)
 99c:	39a3      	bseti      	r1, r1, 3
 99e:	b32b      	st.w      	r1, (r3, 0x2c)
 9a0:	07de      	br      	0x95c	// 95c <EPMW_Soft_Lock_Auto_adjust_Configure+0x38>
			EPWM->SLCON&=0XFFFFFFF7;
 9a2:	934b      	ld.w      	r2, (r3, 0x2c)
 9a4:	3a83      	bclri      	r2, r2, 3
 9a6:	07cf      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_DECA_EN1)
 9a8:	3845      	cmpnei      	r0, 5
 9aa:	0812      	bt      	0x9ce	// 9ce <EPMW_Soft_Lock_Auto_adjust_Configure+0xaa>
 9ac:	1162      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 9ae:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000010;
 9b0:	9360      	ld.w      	r3, (r3, 0)
 9b2:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 9b4:	0c0a      	bf      	0x9c8	// 9c8 <EPMW_Soft_Lock_Auto_adjust_Configure+0xa4>
			EPWM->SLCON|=0X00000010;
 9b6:	932b      	ld.w      	r1, (r3, 0x2c)
 9b8:	39a4      	bseti      	r1, r1, 4
			EPWM->SLCON|=0X00000040;
 9ba:	b32b      	st.w      	r1, (r3, 0x2c)
			EPWM->SLSTEP1=(EPWM->SLSTEP1&0XFFFFF000)|INC_DEC_STEPX;
 9bc:	932d      	ld.w      	r1, (r3, 0x34)
 9be:	101f      	lrw      	r0, 0xfff	// a38 <EPMW_Soft_Lock_Auto_adjust_Configure+0x114>
 9c0:	6841      	andn      	r1, r0
			EPWM->SLSTEP1=(EPWM->SLSTEP1&0XFF000FFF)|(INC_DEC_STEPX<<12);
 9c2:	6c84      	or      	r2, r1
 9c4:	b34d      	st.w      	r2, (r3, 0x34)
 9c6:	07d1      	br      	0x968	// 968 <EPMW_Soft_Lock_Auto_adjust_Configure+0x44>
			EPWM->SLCON&=0XFFFFFFEF;
 9c8:	934b      	ld.w      	r2, (r3, 0x2c)
 9ca:	3a84      	bclri      	r2, r2, 4
 9cc:	07bc      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_INCA_EN1)
 9ce:	3846      	cmpnei      	r0, 6
 9d0:	0811      	bt      	0x9f2	// 9f2 <EPMW_Soft_Lock_Auto_adjust_Configure+0xce>
 9d2:	1079      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 9d4:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000020;
 9d6:	9360      	ld.w      	r3, (r3, 0)
 9d8:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 9da:	0c09      	bf      	0x9ec	// 9ec <EPMW_Soft_Lock_Auto_adjust_Configure+0xc8>
			EPWM->SLCON|=0X00000020;
 9dc:	932b      	ld.w      	r1, (r3, 0x2c)
 9de:	39a5      	bseti      	r1, r1, 5
			EPWM->SLCON|=0X00000080;
 9e0:	b32b      	st.w      	r1, (r3, 0x2c)
			EPWM->SLSTEP1=(EPWM->SLSTEP1&0XFF000FFF)|(INC_DEC_STEPX<<12);
 9e2:	932d      	ld.w      	r1, (r3, 0x34)
 9e4:	1016      	lrw      	r0, 0xfff000	// a3c <EPMW_Soft_Lock_Auto_adjust_Configure+0x118>
 9e6:	6841      	andn      	r1, r0
 9e8:	424c      	lsli      	r2, r2, 12
 9ea:	07ec      	br      	0x9c2	// 9c2 <EPMW_Soft_Lock_Auto_adjust_Configure+0x9e>
			EPWM->SLCON&=0XFFFFFFDF;
 9ec:	934b      	ld.w      	r2, (r3, 0x2c)
 9ee:	3a85      	bclri      	r2, r2, 5
 9f0:	07aa      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_DECB_EN1)
 9f2:	3847      	cmpnei      	r0, 7
 9f4:	080c      	bt      	0xa0c	// a0c <EPMW_Soft_Lock_Auto_adjust_Configure+0xe8>
 9f6:	1070      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 9f8:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000040;
 9fa:	9360      	ld.w      	r3, (r3, 0)
 9fc:	237f      	addi      	r3, 128
		if (NewState != DISABLE)
 9fe:	0c04      	bf      	0xa06	// a06 <EPMW_Soft_Lock_Auto_adjust_Configure+0xe2>
			EPWM->SLCON|=0X00000040;
 a00:	932b      	ld.w      	r1, (r3, 0x2c)
 a02:	39a6      	bseti      	r1, r1, 6
 a04:	07db      	br      	0x9ba	// 9ba <EPMW_Soft_Lock_Auto_adjust_Configure+0x96>
			EPWM->SLCON&=0XFFFFFFBF;
 a06:	934b      	ld.w      	r2, (r3, 0x2c)
 a08:	3a86      	bclri      	r2, r2, 6
 a0a:	079d      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_INCB_EN1)
 a0c:	3848      	cmpnei      	r0, 8
 a0e:	080e      	bt      	0xa2a	// a2a <EPMW_Soft_Lock_Auto_adjust_Configure+0x106>
 a10:	1069      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 a12:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000080;
 a14:	9360      	ld.w      	r3, (r3, 0)
		if (NewState != DISABLE)
 a16:	0c06      	bf      	0xa22	// a22 <EPMW_Soft_Lock_Auto_adjust_Configure+0xfe>
			EPWM->SLCON|=0X00000080;
 a18:	3080      	movi      	r0, 128
 a1a:	60c0      	addu      	r3, r0
 a1c:	932b      	ld.w      	r1, (r3, 0x2c)
 a1e:	6c40      	or      	r1, r0
 a20:	07e0      	br      	0x9e0	// 9e0 <EPMW_Soft_Lock_Auto_adjust_Configure+0xbc>
			EPWM->SLCON&=0XFFFFFF7F;
 a22:	237f      	addi      	r3, 128
 a24:	934b      	ld.w      	r2, (r3, 0x2c)
 a26:	3a87      	bclri      	r2, r2, 7
 a28:	078e      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_CNTR_DEC_EN)
 a2a:	3849      	cmpnei      	r0, 9
 a2c:	0812      	bt      	0xa50	// a50 <EPMW_Soft_Lock_Auto_adjust_Configure+0x12c>
 a2e:	1062      	lrw      	r3, 0	// a34 <EPMW_Soft_Lock_Auto_adjust_Configure+0x110>
		if (NewState != DISABLE)
 a30:	3940      	cmpnei      	r1, 0
 a32:	0407      	br      	0xa40	// a40 <EPMW_Soft_Lock_Auto_adjust_Configure+0x11c>
 a34:	00000000 	.long	0x00000000
 a38:	00000fff 	.long	0x00000fff
 a3c:	00fff000 	.long	0x00fff000
			EPWM->SLCON|=0X00000100;
 a40:	9360      	ld.w      	r3, (r3, 0)
 a42:	237f      	addi      	r3, 128
 a44:	934b      	ld.w      	r2, (r3, 0x2c)
		if (NewState != DISABLE)
 a46:	0c03      	bf      	0xa4c	// a4c <EPMW_Soft_Lock_Auto_adjust_Configure+0x128>
			EPWM->SLCON|=0X00000100;
 a48:	3aa8      	bseti      	r2, r2, 8
 a4a:	077d      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
			EPWM->SLCON&=0XFFFFFEFF;
 a4c:	3a88      	bclri      	r2, r2, 8
 a4e:	077b      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
	else if(EPWM_SLCON__X==EPWM_SL_CNTR_INC_EN)
 a50:	384a      	cmpnei      	r0, 10
 a52:	0b8b      	bt      	0x968	// 968 <EPMW_Soft_Lock_Auto_adjust_Configure+0x44>
 a54:	1360      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		if (NewState != DISABLE)
 a56:	3940      	cmpnei      	r1, 0
			EPWM->SLCON|=0X00000200;
 a58:	9360      	ld.w      	r3, (r3, 0)
 a5a:	237f      	addi      	r3, 128
 a5c:	934b      	ld.w      	r2, (r3, 0x2c)
		if (NewState != DISABLE)
 a5e:	0c03      	bf      	0xa64	// a64 <EPMW_Soft_Lock_Auto_adjust_Configure+0x140>
			EPWM->SLCON|=0X00000200;
 a60:	3aa9      	bseti      	r2, r2, 9
 a62:	0771      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>
			EPWM->SLCON&=0XFFFFFDFF;
 a64:	3a89      	bclri      	r2, r2, 9
 a66:	076f      	br      	0x944	// 944 <EPMW_Soft_Lock_Auto_adjust_Configure+0x20>

00000a68 <EPMW_Soft_Lock_output_SLPXS_CMD>:
//EntryParameter:NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void EPMW_Soft_Lock_output_SLPXS_CMD(FunctionalStatus NewState)		
{
 a68:	127b      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
	if (NewState != DISABLE)
 a6a:	3840      	cmpnei      	r0, 0
	{
		EPWM->SLCON|=0X01000000;								//一直output SL_PXS设置状态  
 a6c:	9360      	ld.w      	r3, (r3, 0)
 a6e:	237f      	addi      	r3, 128
 a70:	934b      	ld.w      	r2, (r3, 0x2c)
	if (NewState != DISABLE)
 a72:	0c04      	bf      	0xa7a	// a7a <EPMW_Soft_Lock_output_SLPXS_CMD+0x12>
		EPWM->SLCON|=0X01000000;								//一直output SL_PXS设置状态  
 a74:	3ab8      	bseti      	r2, r2, 24
	}
	else
	{
		EPWM->SLCON&=0XFEFFFFFF;								//只output一个周期 SL_PXS设置状态后输出PWM
 a76:	b34b      	st.w      	r2, (r3, 0x2c)
	}
}
 a78:	783c      	rts
		EPWM->SLCON&=0XFEFFFFFF;								//只output一个周期 SL_PXS设置状态后输出PWM
 a7a:	3a98      	bclri      	r2, r2, 24
 a7c:	07fd      	br      	0xa76	// a76 <EPMW_Soft_Lock_output_SLPXS_CMD+0xe>

00000a7e <EPWM_EXTRG_Configure>:
//EPWM_EXTRG_Mode_X:EPWM_EXTRG_Mode_NONE,EPWM_EXTRG_Mode_ADC,EPWM_EXTRG_Mode_STC16,EPWM_EXTRG_Mode_AdcStc16
//ReturnValue:NONE
/*************************************************************/
void EPWM_EXTRG_Configure(EPWM_EXTRG_EVET_TypeDef EPWM_EXTRG_EVET_X , EPWM_EXTRG_Mode_TypeDef EPWM_EXTRG_Mode_X)	
{
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_START)
 a7e:	3840      	cmpnei      	r0, 0
 a80:	080c      	bt      	0xa98	// a98 <EPWM_EXTRG_Configure+0x1a>
	{
		EPWM->EXTRG0&=0XFFFFFFFC;
 a82:	1275      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
 a84:	9360      	ld.w      	r3, (r3, 0)
 a86:	237f      	addi      	r3, 128
 a88:	9352      	ld.w      	r2, (r3, 0x48)
 a8a:	3a80      	bclri      	r2, r2, 0
 a8c:	3a81      	bclri      	r2, r2, 1
 a8e:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X;
 a90:	9352      	ld.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<20;
	}
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CENTER)
	{
		EPWM->EXTRG0&=0XFF3FFFFF;
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<22;
 a92:	6c48      	or      	r1, r2
 a94:	b332      	st.w      	r1, (r3, 0x48)
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CMPBDM)
	{
		EPWM->EXTRG1&=0XFF3FFFFF;
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<22;
	}
}	
 a96:	783c      	rts
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_STOP)
 a98:	3841      	cmpnei      	r0, 1
 a9a:	080b      	bt      	0xab0	// ab0 <EPWM_EXTRG_Configure+0x32>
		EPWM->EXTRG0&=0XFFFFFFF3;
 a9c:	126e      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<2;
 a9e:	4122      	lsli      	r1, r1, 2
		EPWM->EXTRG0&=0XFFFFFFF3;
 aa0:	9360      	ld.w      	r3, (r3, 0)
 aa2:	237f      	addi      	r3, 128
 aa4:	9352      	ld.w      	r2, (r3, 0x48)
 aa6:	3a82      	bclri      	r2, r2, 2
 aa8:	3a83      	bclri      	r2, r2, 3
 aaa:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<2;
 aac:	9352      	ld.w      	r2, (r3, 0x48)
 aae:	07f2      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_PEND)
 ab0:	3842      	cmpnei      	r0, 2
 ab2:	080b      	bt      	0xac8	// ac8 <EPWM_EXTRG_Configure+0x4a>
		EPWM->EXTRG0&=0XFFFFFFCF;
 ab4:	1268      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<4;
 ab6:	4124      	lsli      	r1, r1, 4
		EPWM->EXTRG0&=0XFFFFFFCF;
 ab8:	9360      	ld.w      	r3, (r3, 0)
 aba:	237f      	addi      	r3, 128
 abc:	9352      	ld.w      	r2, (r3, 0x48)
 abe:	3a84      	bclri      	r2, r2, 4
 ac0:	3a85      	bclri      	r2, r2, 5
 ac2:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<4;
 ac4:	9352      	ld.w      	r2, (r3, 0x48)
 ac6:	07e6      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_CENTER)
 ac8:	3843      	cmpnei      	r0, 3
 aca:	080b      	bt      	0xae0	// ae0 <EPWM_EXTRG_Configure+0x62>
		EPWM->EXTRG0&=0XFFFFFF3F;
 acc:	1262      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<6;
 ace:	4126      	lsli      	r1, r1, 6
		EPWM->EXTRG0&=0XFFFFFF3F;
 ad0:	9360      	ld.w      	r3, (r3, 0)
 ad2:	237f      	addi      	r3, 128
 ad4:	9352      	ld.w      	r2, (r3, 0x48)
 ad6:	3a86      	bclri      	r2, r2, 6
 ad8:	3a87      	bclri      	r2, r2, 7
 ada:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<6;
 adc:	9352      	ld.w      	r2, (r3, 0x48)
 ade:	07da      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_START)
 ae0:	3844      	cmpnei      	r0, 4
 ae2:	080b      	bt      	0xaf8	// af8 <EPWM_EXTRG_Configure+0x7a>
		EPWM->EXTRG0&=0XFFFFFCFF;
 ae4:	117c      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<8;
 ae6:	4128      	lsli      	r1, r1, 8
		EPWM->EXTRG0&=0XFFFFFCFF;
 ae8:	9360      	ld.w      	r3, (r3, 0)
 aea:	237f      	addi      	r3, 128
 aec:	9352      	ld.w      	r2, (r3, 0x48)
 aee:	3a88      	bclri      	r2, r2, 8
 af0:	3a89      	bclri      	r2, r2, 9
 af2:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<8;
 af4:	9352      	ld.w      	r2, (r3, 0x48)
 af6:	07ce      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_STOP)
 af8:	3845      	cmpnei      	r0, 5
 afa:	080b      	bt      	0xb10	// b10 <EPWM_EXTRG_Configure+0x92>
		EPWM->EXTRG0&=0XFFFFF3FF;
 afc:	1176      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<10;
 afe:	412a      	lsli      	r1, r1, 10
		EPWM->EXTRG0&=0XFFFFF3FF;
 b00:	9360      	ld.w      	r3, (r3, 0)
 b02:	237f      	addi      	r3, 128
 b04:	9352      	ld.w      	r2, (r3, 0x48)
 b06:	3a8a      	bclri      	r2, r2, 10
 b08:	3a8b      	bclri      	r2, r2, 11
 b0a:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<10;
 b0c:	9352      	ld.w      	r2, (r3, 0x48)
 b0e:	07c2      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_PEND)
 b10:	3846      	cmpnei      	r0, 6
 b12:	080b      	bt      	0xb28	// b28 <EPWM_EXTRG_Configure+0xaa>
		EPWM->EXTRG0&=0XFFFFCFFF;
 b14:	1170      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<12;
 b16:	412c      	lsli      	r1, r1, 12
		EPWM->EXTRG0&=0XFFFFCFFF;
 b18:	9360      	ld.w      	r3, (r3, 0)
 b1a:	237f      	addi      	r3, 128
 b1c:	9352      	ld.w      	r2, (r3, 0x48)
 b1e:	3a8c      	bclri      	r2, r2, 12
 b20:	3a8d      	bclri      	r2, r2, 13
 b22:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<12;
 b24:	9352      	ld.w      	r2, (r3, 0x48)
 b26:	07b6      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_CENTER)
 b28:	3847      	cmpnei      	r0, 7
 b2a:	080b      	bt      	0xb40	// b40 <EPWM_EXTRG_Configure+0xc2>
		EPWM->EXTRG0&=0XFFFF3FFF;
 b2c:	116a      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<14;
 b2e:	412e      	lsli      	r1, r1, 14
		EPWM->EXTRG0&=0XFFFF3FFF;
 b30:	9360      	ld.w      	r3, (r3, 0)
 b32:	237f      	addi      	r3, 128
 b34:	9352      	ld.w      	r2, (r3, 0x48)
 b36:	3a8e      	bclri      	r2, r2, 14
 b38:	3a8f      	bclri      	r2, r2, 15
 b3a:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<14;
 b3c:	9352      	ld.w      	r2, (r3, 0x48)
 b3e:	07aa      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_START)
 b40:	3848      	cmpnei      	r0, 8
 b42:	080b      	bt      	0xb58	// b58 <EPWM_EXTRG_Configure+0xda>
		EPWM->EXTRG0&=0XFFFCFFFF;
 b44:	1164      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<16;
 b46:	4130      	lsli      	r1, r1, 16
		EPWM->EXTRG0&=0XFFFCFFFF;
 b48:	9360      	ld.w      	r3, (r3, 0)
 b4a:	237f      	addi      	r3, 128
 b4c:	9352      	ld.w      	r2, (r3, 0x48)
 b4e:	3a90      	bclri      	r2, r2, 16
 b50:	3a91      	bclri      	r2, r2, 17
 b52:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<16;
 b54:	9352      	ld.w      	r2, (r3, 0x48)
 b56:	079e      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_STOP)
 b58:	3849      	cmpnei      	r0, 9
 b5a:	080b      	bt      	0xb70	// b70 <EPWM_EXTRG_Configure+0xf2>
		EPWM->EXTRG0&=0XFFF3FFFF;
 b5c:	107e      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<18;
 b5e:	4132      	lsli      	r1, r1, 18
		EPWM->EXTRG0&=0XFFF3FFFF;
 b60:	9360      	ld.w      	r3, (r3, 0)
 b62:	237f      	addi      	r3, 128
 b64:	9352      	ld.w      	r2, (r3, 0x48)
 b66:	3a92      	bclri      	r2, r2, 18
 b68:	3a93      	bclri      	r2, r2, 19
 b6a:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<18;
 b6c:	9352      	ld.w      	r2, (r3, 0x48)
 b6e:	0792      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_PEND)
 b70:	384a      	cmpnei      	r0, 10
 b72:	080b      	bt      	0xb88	// b88 <EPWM_EXTRG_Configure+0x10a>
		EPWM->EXTRG0&=0XFFCFFFFF;
 b74:	1078      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<20;
 b76:	4134      	lsli      	r1, r1, 20
		EPWM->EXTRG0&=0XFFCFFFFF;
 b78:	9360      	ld.w      	r3, (r3, 0)
 b7a:	237f      	addi      	r3, 128
 b7c:	9352      	ld.w      	r2, (r3, 0x48)
 b7e:	3a94      	bclri      	r2, r2, 20
 b80:	3a95      	bclri      	r2, r2, 21
 b82:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<20;
 b84:	9352      	ld.w      	r2, (r3, 0x48)
 b86:	0786      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CENTER)
 b88:	384b      	cmpnei      	r0, 11
 b8a:	080b      	bt      	0xba0	// ba0 <EPWM_EXTRG_Configure+0x122>
		EPWM->EXTRG0&=0XFF3FFFFF;
 b8c:	1072      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<22;
 b8e:	4136      	lsli      	r1, r1, 22
		EPWM->EXTRG0&=0XFF3FFFFF;
 b90:	9360      	ld.w      	r3, (r3, 0)
 b92:	237f      	addi      	r3, 128
 b94:	9352      	ld.w      	r2, (r3, 0x48)
 b96:	3a96      	bclri      	r2, r2, 22
 b98:	3a97      	bclri      	r2, r2, 23
 b9a:	b352      	st.w      	r2, (r3, 0x48)
		EPWM->EXTRG0|=EPWM_EXTRG_Mode_X<<22;
 b9c:	9352      	ld.w      	r2, (r3, 0x48)
 b9e:	077a      	br      	0xa92	// a92 <EPWM_EXTRG_Configure+0x14>
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_CMPAUM)
 ba0:	384c      	cmpnei      	r0, 12
 ba2:	080c      	bt      	0xbba	// bba <EPWM_EXTRG_Configure+0x13c>
		EPWM->EXTRG1&=0XFFFFFFFC;
 ba4:	106c      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
 ba6:	9360      	ld.w      	r3, (r3, 0)
 ba8:	237f      	addi      	r3, 128
 baa:	9353      	ld.w      	r2, (r3, 0x4c)
 bac:	3a80      	bclri      	r2, r2, 0
 bae:	3a81      	bclri      	r2, r2, 1
 bb0:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X;
 bb2:	9353      	ld.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<22;
 bb4:	6c48      	or      	r1, r2
 bb6:	b333      	st.w      	r1, (r3, 0x4c)
}	
 bb8:	076f      	br      	0xa96	// a96 <EPWM_EXTRG_Configure+0x18>
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_CMPADM)
 bba:	384d      	cmpnei      	r0, 13
 bbc:	080e      	bt      	0xbd8	// bd8 <EPWM_EXTRG_Configure+0x15a>
		EPWM->EXTRG1&=0XFFFFFFF3;
 bbe:	1066      	lrw      	r3, 0	// bd4 <EPWM_EXTRG_Configure+0x156>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<2;
 bc0:	4122      	lsli      	r1, r1, 2
		EPWM->EXTRG1&=0XFFFFFFF3;
 bc2:	9360      	ld.w      	r3, (r3, 0)
 bc4:	237f      	addi      	r3, 128
 bc6:	9353      	ld.w      	r2, (r3, 0x4c)
 bc8:	3a82      	bclri      	r2, r2, 2
 bca:	3a83      	bclri      	r2, r2, 3
 bcc:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<2;
 bce:	9353      	ld.w      	r2, (r3, 0x4c)
 bd0:	07f2      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
 bd2:	0000      	bkpt
 bd4:	00000000 	.long	0x00000000
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_CMPBUM)
 bd8:	384e      	cmpnei      	r0, 14
 bda:	080b      	bt      	0xbf0	// bf0 <EPWM_EXTRG_Configure+0x172>
		EPWM->EXTRG1&=0XFFFFFFCF;
 bdc:	126b      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<4;
 bde:	4124      	lsli      	r1, r1, 4
		EPWM->EXTRG1&=0XFFFFFFCF;
 be0:	9360      	ld.w      	r3, (r3, 0)
 be2:	237f      	addi      	r3, 128
 be4:	9353      	ld.w      	r2, (r3, 0x4c)
 be6:	3a84      	bclri      	r2, r2, 4
 be8:	3a85      	bclri      	r2, r2, 5
 bea:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<4;
 bec:	9353      	ld.w      	r2, (r3, 0x4c)
 bee:	07e3      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM0_EXTRG_CMPBDM)
 bf0:	384f      	cmpnei      	r0, 15
 bf2:	080b      	bt      	0xc08	// c08 <EPWM_EXTRG_Configure+0x18a>
		EPWM->EXTRG1&=0XFFFFFF3F;
 bf4:	1265      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<6;
 bf6:	4126      	lsli      	r1, r1, 6
		EPWM->EXTRG1&=0XFFFFFF3F;
 bf8:	9360      	ld.w      	r3, (r3, 0)
 bfa:	237f      	addi      	r3, 128
 bfc:	9353      	ld.w      	r2, (r3, 0x4c)
 bfe:	3a86      	bclri      	r2, r2, 6
 c00:	3a87      	bclri      	r2, r2, 7
 c02:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<6;
 c04:	9353      	ld.w      	r2, (r3, 0x4c)
 c06:	07d7      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_CMPAUM)
 c08:	3850      	cmpnei      	r0, 16
 c0a:	080b      	bt      	0xc20	// c20 <EPWM_EXTRG_Configure+0x1a2>
		EPWM->EXTRG1&=0XFFFFFCFF;
 c0c:	117f      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<8;
 c0e:	4128      	lsli      	r1, r1, 8
		EPWM->EXTRG1&=0XFFFFFCFF;
 c10:	9360      	ld.w      	r3, (r3, 0)
 c12:	237f      	addi      	r3, 128
 c14:	9353      	ld.w      	r2, (r3, 0x4c)
 c16:	3a88      	bclri      	r2, r2, 8
 c18:	3a89      	bclri      	r2, r2, 9
 c1a:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<8;
 c1c:	9353      	ld.w      	r2, (r3, 0x4c)
 c1e:	07cb      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_CMPADM)
 c20:	3851      	cmpnei      	r0, 17
 c22:	080b      	bt      	0xc38	// c38 <EPWM_EXTRG_Configure+0x1ba>
		EPWM->EXTRG1&=0XFFFFF3FF;
 c24:	1179      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<10;
 c26:	412a      	lsli      	r1, r1, 10
		EPWM->EXTRG1&=0XFFFFF3FF;
 c28:	9360      	ld.w      	r3, (r3, 0)
 c2a:	237f      	addi      	r3, 128
 c2c:	9353      	ld.w      	r2, (r3, 0x4c)
 c2e:	3a8a      	bclri      	r2, r2, 10
 c30:	3a8b      	bclri      	r2, r2, 11
 c32:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<10;
 c34:	9353      	ld.w      	r2, (r3, 0x4c)
 c36:	07bf      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_CMPBUM)
 c38:	3852      	cmpnei      	r0, 18
 c3a:	080b      	bt      	0xc50	// c50 <EPWM_EXTRG_Configure+0x1d2>
		EPWM->EXTRG1&=0XFFFFCFFF;
 c3c:	1173      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<12;
 c3e:	412c      	lsli      	r1, r1, 12
		EPWM->EXTRG1&=0XFFFFCFFF;
 c40:	9360      	ld.w      	r3, (r3, 0)
 c42:	237f      	addi      	r3, 128
 c44:	9353      	ld.w      	r2, (r3, 0x4c)
 c46:	3a8c      	bclri      	r2, r2, 12
 c48:	3a8d      	bclri      	r2, r2, 13
 c4a:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<12;
 c4c:	9353      	ld.w      	r2, (r3, 0x4c)
 c4e:	07b3      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM1_EXTRG_CMPBDM)
 c50:	3853      	cmpnei      	r0, 19
 c52:	080b      	bt      	0xc68	// c68 <EPWM_EXTRG_Configure+0x1ea>
		EPWM->EXTRG1&=0XFFFF3FFF;
 c54:	116d      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<14;
 c56:	412e      	lsli      	r1, r1, 14
		EPWM->EXTRG1&=0XFFFF3FFF;
 c58:	9360      	ld.w      	r3, (r3, 0)
 c5a:	237f      	addi      	r3, 128
 c5c:	9353      	ld.w      	r2, (r3, 0x4c)
 c5e:	3a8e      	bclri      	r2, r2, 14
 c60:	3a8f      	bclri      	r2, r2, 15
 c62:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<14;
 c64:	9353      	ld.w      	r2, (r3, 0x4c)
 c66:	07a7      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CMPAUM)
 c68:	3854      	cmpnei      	r0, 20
 c6a:	080b      	bt      	0xc80	// c80 <EPWM_EXTRG_Configure+0x202>
		EPWM->EXTRG1&=0XFFFCFFFF;
 c6c:	1167      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<16;
 c6e:	4130      	lsli      	r1, r1, 16
		EPWM->EXTRG1&=0XFFFCFFFF;
 c70:	9360      	ld.w      	r3, (r3, 0)
 c72:	237f      	addi      	r3, 128
 c74:	9353      	ld.w      	r2, (r3, 0x4c)
 c76:	3a90      	bclri      	r2, r2, 16
 c78:	3a91      	bclri      	r2, r2, 17
 c7a:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<16;
 c7c:	9353      	ld.w      	r2, (r3, 0x4c)
 c7e:	079b      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CMPADM)
 c80:	3855      	cmpnei      	r0, 21
 c82:	080b      	bt      	0xc98	// c98 <EPWM_EXTRG_Configure+0x21a>
		EPWM->EXTRG1&=0XFFF3FFFF;
 c84:	1161      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<18;
 c86:	4132      	lsli      	r1, r1, 18
		EPWM->EXTRG1&=0XFFF3FFFF;
 c88:	9360      	ld.w      	r3, (r3, 0)
 c8a:	237f      	addi      	r3, 128
 c8c:	9353      	ld.w      	r2, (r3, 0x4c)
 c8e:	3a92      	bclri      	r2, r2, 18
 c90:	3a93      	bclri      	r2, r2, 19
 c92:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<18;
 c94:	9353      	ld.w      	r2, (r3, 0x4c)
 c96:	078f      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CMPBUM)
 c98:	3856      	cmpnei      	r0, 22
 c9a:	080b      	bt      	0xcb0	// cb0 <EPWM_EXTRG_Configure+0x232>
		EPWM->EXTRG1&=0XFFCFFFFF;
 c9c:	107b      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<20;
 c9e:	4134      	lsli      	r1, r1, 20
		EPWM->EXTRG1&=0XFFCFFFFF;
 ca0:	9360      	ld.w      	r3, (r3, 0)
 ca2:	237f      	addi      	r3, 128
 ca4:	9353      	ld.w      	r2, (r3, 0x4c)
 ca6:	3a94      	bclri      	r2, r2, 20
 ca8:	3a95      	bclri      	r2, r2, 21
 caa:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<20;
 cac:	9353      	ld.w      	r2, (r3, 0x4c)
 cae:	0783      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>
	if(EPWM_EXTRG_EVET_X==EPWM2_EXTRG_CMPBDM)
 cb0:	3857      	cmpnei      	r0, 23
 cb2:	0af2      	bt      	0xa96	// a96 <EPWM_EXTRG_Configure+0x18>
		EPWM->EXTRG1&=0XFF3FFFFF;
 cb4:	1075      	lrw      	r3, 0	// d08 <EPWM_Wakeup_Disable+0x12>
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<22;
 cb6:	4136      	lsli      	r1, r1, 22
		EPWM->EXTRG1&=0XFF3FFFFF;
 cb8:	9360      	ld.w      	r3, (r3, 0)
 cba:	237f      	addi      	r3, 128
 cbc:	9353      	ld.w      	r2, (r3, 0x4c)
 cbe:	3a96      	bclri      	r2, r2, 22
 cc0:	3a97      	bclri      	r2, r2, 23
 cc2:	b353      	st.w      	r2, (r3, 0x4c)
		EPWM->EXTRG1|=EPWM_EXTRG_Mode_X<<22;
 cc4:	9353      	ld.w      	r2, (r3, 0x4c)
 cc6:	0777      	br      	0xbb4	// bb4 <EPWM_EXTRG_Configure+0x136>

00000cc8 <EPWM_Int_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Int_Enable(void)
{
    INTC_ISER_WRITE(EPWM_INT);    
 cc8:	1071      	lrw      	r3, 0	// d0c <EPWM_Wakeup_Disable+0x16>
 cca:	3280      	movi      	r2, 128
 ccc:	9360      	ld.w      	r3, (r3, 0)
 cce:	23ff      	addi      	r3, 256
 cd0:	4242      	lsli      	r2, r2, 2
 cd2:	b340      	st.w      	r2, (r3, 0)
}
 cd4:	783c      	rts

00000cd6 <EPWM_Int_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Int_Disable(void)
{
    INTC_ICER_WRITE(EPWM_INT);    
 cd6:	106e      	lrw      	r3, 0	// d0c <EPWM_Wakeup_Disable+0x16>
 cd8:	32c0      	movi      	r2, 192
 cda:	9360      	ld.w      	r3, (r3, 0)
 cdc:	4241      	lsli      	r2, r2, 1
 cde:	60c8      	addu      	r3, r2
 ce0:	3280      	movi      	r2, 128
 ce2:	4242      	lsli      	r2, r2, 2
 ce4:	b340      	st.w      	r2, (r3, 0)
}
 ce6:	783c      	rts

00000ce8 <EPWM_Wakeup_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Wakeup_Enable(void)
{
    INTC_IWER_WRITE(EPWM_INT);    
 ce8:	1069      	lrw      	r3, 0	// d0c <EPWM_Wakeup_Disable+0x16>
 cea:	3280      	movi      	r2, 128
 cec:	9360      	ld.w      	r3, (r3, 0)
 cee:	23ff      	addi      	r3, 256
 cf0:	4242      	lsli      	r2, r2, 2
 cf2:	b350      	st.w      	r2, (r3, 0x40)
}
 cf4:	783c      	rts

00000cf6 <EPWM_Wakeup_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EPWM_Wakeup_Disable(void)
{
    INTC_IWDR_WRITE(EPWM_INT);    
 cf6:	1066      	lrw      	r3, 0	// d0c <EPWM_Wakeup_Disable+0x16>
 cf8:	32e0      	movi      	r2, 224
 cfa:	9360      	ld.w      	r3, (r3, 0)
 cfc:	4241      	lsli      	r2, r2, 1
 cfe:	60c8      	addu      	r3, r2
 d00:	3280      	movi      	r2, 128
 d02:	4242      	lsli      	r2, r2, 2
 d04:	b340      	st.w      	r2, (r3, 0)
}
 d06:	783c      	rts
	...
